# `vmaxub` — Vector Maximum Unsigned Byte

> **Category:** [VMX (Altivec)](../categories/vmx.md) · **Form:** [VX](../forms/VX.md) · **Opcode:** `0x10000002`

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## Assembler Mnemonics

| Mnemonic | XML entry | Flags | Description |
| --- | --- | --- | --- |
| `vmaxub` | `vmaxub` | — | Vector Maximum Unsigned Byte |

## Syntax

```asm
vmaxub [VD], [VA], [VB]
```

## Encoding

### `vmaxub` — form `VX`

- **Opcode word:** `0x10000002`
- **Primary opcode (bits 0–5):** `4`
- **Extended opcode:** `2`
- **Synchronising:** no

| Bits | Field | Meaning |
| --- | --- | --- |
| 0–5 | `OPCD` | primary opcode (4) |
| 6–10 | `VRT/VD` | destination vector register |
| 11–15 | `VRA/VA` | source A vector register |
| 16–20 | `VRB/VB` | source B vector register |
| 21–31 | `XO` | extended opcode (11 bits) |

## Operands

| Field | Role | Description |
| --- | --- | --- |
| `VA` | vmaxub: read | Source A vector register. |
| `VB` | vmaxub: read | Source B vector register. |
| `VD` | vmaxub: write | Destination vector register. |

## Register Effects

### `vmaxub`

- **Reads (always):** `VA`, `VB`
- **Reads (conditional):** _none_
- **Writes (always):** `VD`
- **Writes (conditional):** _none_

## Status-Register Effects

_No condition-register or status-register effects._

## Operation (pseudocode)

```
; No hand-written pseudocode for this instruction yet.
; The authoritative semantics are the Canary emitter snapshot under
; Implementation References; about half of Canary's emitters open
; with the PPC-style definition as a comment (`RD <- (RA) + (RB)`).
; Every side effect is also enumerated in the Register Effects and
; Status-Register Effects tables above.
```

## C Translation Example

```c
/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */
```

## Implementation References

**`vmaxub`**
- Canary XML: [`tools/ppc-instructions.xml` — search for `mnem="vmaxub"`](https://github.com/xenia-canary/xenia-canary/blob/f21ebd49e979e44f081f474df78c3fbfee9cb3f2/tools/ppc-instructions.xml)
- Canary emitter: [`src/xenia/cpu/ppc/ppc_emit_altivec.cc:846`](https://github.com/xenia-canary/xenia-canary/blob/f21ebd49e979e44f081f474df78c3fbfee9cb3f2/src/xenia/cpu/ppc/ppc_emit_altivec.cc#L846)
- Sylpheed opcode: [`crates/sylpheed-ppc/src/opcode.rs:355`](../../../crates/sylpheed-ppc/src/opcode.rs#L355)
- Sylpheed decoder: [`crates/sylpheed-ppc/src/decoder.rs:550`](../../../crates/sylpheed-ppc/src/decoder.rs#L550)
<details><summary>Canary emitter (frozen snapshot @ <code>f21ebd49e9</code>)</summary>

```cpp
int InstrEmit_vmaxub(PPCHIRBuilder& f, const InstrData& i) {
  // (VD) <- max((VA), (VB)) (unsigned int8)
  Value* v = f.VectorMax(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT8_TYPE,
                         ARITHMETIC_UNSIGNED);
  f.StoreVR(i.VX.VD, v);
  return 0;
}
```
</details>

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## Special Cases & Edge Conditions

- **Per-byte unsigned max.** Sixteen byte lanes; `VD[i] = max(uint8(VA[i]), uint8(VB[i]))`. Lane 0 is the most-significant byte.
- **Unsigned ordering.** `vmaxub(0xFF, 0x01) = 0xFF`, opposite to [`vmaxsb`](vmaxsb.md).
- **No `VSCR` interaction, no XER, no exceptions.**
- **Common usage.** Pixel "brighter of two" channel selection; alpha mask combining.
- **Aliasing legal.** `vmaxub v3, v3, v4` raises `v3`'s lower bound to `v4`.
- **No VMX128 sibling.**

## Related Instructions

- [`vminub`](vminub.md) — the matching minimum.
- [`vmaxsb`](vmaxsb.md) — same width, signed max.
- [`vmaxuh`](vmaxuh.md), [`vmaxuw`](vmaxuw.md) — unsigned max at half / word width.
- [`vcmpgtub`](vcmpgtub.md) — separate compare-and-mask path.
- [`vsel`](vsel.md) — alternative selection.

## IBM Reference

- [AIX 7.3 — `vmaxub` (Vector Maximum Unsigned Byte)](https://www.ibm.com/docs/en/aix/7.3.0?topic=set-vmaxub-vector-maximum-unsigned-byte-instruction)
- [IBM AltiVec Technology Programmer's Interface Manual, Chapter 6 — Min/Max](https://www.nxp.com/docs/en/reference-manual/ALTIVECPIM.pdf)