Sylpheed/tools/ppc-manual/alu/subfcx.md

subfcx — Subtract From Carrying

Category: Integer ALU · Form: XO · Opcode: 0x7c000010

Assembler Mnemonics

Mnemonic	XML entry	Flags	Description
subfc	subfcx	—	Subtract From Carrying
subfco	subfcx	OE=1	Subtract From Carrying
subfc.	subfcx	Rc=1	Subtract From Carrying
subfco.	subfcx	OE=1, Rc=1	Subtract From Carrying

Syntax

subfc[OE][Rc] [RD], [RA], [RB]

Encoding

subfcx — form XO

• Opcode word: 0x7c000010
• Primary opcode (bits 0–5): 31
• Extended opcode: 8
• Synchronising: no

Bits	Field	Meaning
0–5	OPCD	primary opcode (31)
6–10	RT	destination GPR
11–15	RA	source A
16–20	RB	source B
21	OE	overflow-enable flag
22–30	XO	extended opcode (9 bits)
31	Rc	record-form flag

Operands

Field	Role	Description
RA	subfcx: read	Source GPR (r0–r31).
RB	subfcx: read	Source GPR.
RD	subfcx: write	Destination GPR.
CR	subfcx: write (conditional)	Condition-register update. When Rc=1, CR field 0 (or CR6 for vector compares, CR1 for FPU) is updated from the result.
OE	subfcx: write (conditional)	Overflow-enable bit. When 1, the instruction updates XER[OV] and stickies XER[SO] on signed overflow.

Register Effects

subfcx

• Reads (always): RA, RB
• Reads (conditional): none
• Writes (always): RD
• Writes (conditional): CR, OE

Status-Register Effects

• subfcx: CR0 ← signed-compare(result, 0) with SO ← XER[SO], when Rc=1.; XER[OV] ← signed-overflow(result); XER[SO] stickies, when OE=1.

Operation (pseudocode)

RT <- ~(RA) + (RB) + 1
CA <- carry_out

C Translation Example

/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

subfcx

• Canary XML: tools/ppc-instructions.xml — search for mnem="subfcx"
• Canary emitter: src/xenia/cpu/ppc/ppc_emit_alu.cc:441
• Sylpheed opcode: crates/sylpheed-ppc/src/opcode.rs:281
• Sylpheed decoder: crates/sylpheed-ppc/src/decoder.rs:974

Canary emitter (frozen snapshot @ f21ebd49e9)

int InstrEmit_subfcx(PPCHIRBuilder& f, const InstrData& i) {
  // RT <- ¬(RA) + (RB) + 1
  Value* ra = f.LoadGPR(i.XO.RA);
  Value* rb = f.LoadGPR(i.XO.RB);
  Value* v = f.Sub(rb, ra);
  f.StoreGPR(i.XO.RT, v);
  if (i.XO.OE) {
    XEINSTRNOTIMPLEMENTED();
    // e.update_xer_with_overflow(EFLAGS??);
  } else {
    f.StoreCA(SubDidCarry(f, rb, ra));
  }
  if (i.XO.Rc) {
    f.UpdateCR(0, v);
  }
  return 0;
}

Special Cases & Edge Conditions

• RT ← RB − RA with XER[CA] set on no-borrow. Same operand-order convention as subfx: the first source is subtracted from the second.
• XER[CA] = 1 means no borrow occurred — i.e. RB >= RA as unsigned. PowerISA encodes this as the carry-out of ~RA + RB + 1, not as a borrow flag. Canary's SubDidCarry computes it on the low 32 bits: RB[32:63] >= RA[32:63] unsigned.
• No trap on signed overflow. subfco / subfco. set XER[OV] and sticky XER[SO]. Canary's OE branch is XEINSTRNOTIMPLEMENTED() and does not store CA either.
• 64-bit CR update on Xenon, 32-bit in Canary (f.UpdateCR(0, v)). Spec demands a full 64-bit signed compare for subfc..
• Seeds a multi-word subtract chain. Use as the low-word op; continue with subfex for middle words and subfmex/subfzex for the high word.
• Operand aliasing fine. subfc r3, r3, r3 always yields 0 with CA = 1.

Related Instructions

• subfx — same op without XER[CA].
• subfex — ~RA + RB + CA (chain continuation).
• subfmex, subfzex — chain terminators.
• subfic — D-form: RT ← SIMM − RA with XER[CA].
• addcx — dual: addition seed-of-chain.

IBM Reference

• AIX 7.3 — subfc (Subtract From Carrying)