CONSOLIDATION.md Phase 6. Both lived untracked in the project root -- on one
disk, backed up by nothing.
tools/ppc-manual/ 393 files, 3.7 MB. 455 instructions, 350 family pages,
598 mnemonics resolvable through index.json, plus the
generator that produced them.
tools/run-canary.sh the oracle launcher.
🔴 THE LAUNCHER WAS BROKEN IN TWO WAYS AND IS REWRITTEN, not copied:
* it pointed at `xenia-rs/sylpheed.iso`, a SYMLINK. Wine cannot resolve one
and says "path invalid", which reads as a corrupt image rather than a path
problem -- it has cost a session before. It now points at the real file and
warns if handed a symlink.
* it hardcoded one machine's absolute paths, and named `xenia-rs`, which this
consolidation retires. Now derived from the script's own location, with
SYLPH_CANARY_BIN / SYLPH_ISO overrides and a check that each exists.
The standing constraints are in its header where someone will read them: one
emulator at a time, Canary runs MUTED, and never judge a crash or a hang from
a Bash-launched run -- a SIGKILL that looked like the binary was the editor's
process supervisor.
⚠️ The manual's GENERATOR reads the xenia-rs source tree, which is going away.
Its decoder now lives here as crates/sylpheed-ppc, so the generator must be
repointed before it is run again. Recorded in the README rather than left for
someone to discover; the manual's content is checked in and regenerates from
nothing implicitly.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
6.0 KiB
mftb — Move from Time Base
Category: Control / CR / SPR · Form: XFX · Opcode:
0x7c0002e6
Assembler Mnemonics
| Mnemonic | XML entry | Flags | Description |
|---|---|---|---|
mftb |
mftb |
— | Move from Time Base |
Syntax
mftb [RD], [TBR]
Encoding
mftb — form XFX
- Opcode word:
0x7c0002e6 - Primary opcode (bits 0–5):
31 - Extended opcode:
371 - Synchronising: no
| Bits | Field | Meaning |
|---|---|---|
| 0–5 | OPCD |
primary opcode (31) |
| 6–10 | RT |
destination / source GPR |
| 11–20 | spr/tbr/FXM |
SPR/TBR number (byte-swapped halves) or CR field mask |
| 21–30 | XO |
extended opcode |
| 31 | — |
reserved |
Operands
| Field | Role | Description |
|---|---|---|
TBR |
mftb: read | Time-Base Register selector for mftb. |
RD |
mftb: write | Destination GPR. |
Register Effects
mftb
- Reads (always):
TBR - Reads (conditional): none
- Writes (always):
RD - Writes (conditional): none
Status-Register Effects
No condition-register or status-register effects.
Operation (pseudocode)
; Pseudocode derives directly from the xenia-rs interpreter
; arm (see Implementation References). Operation semantics:
; - Read source operands from the fields listed under Operands.
; - Apply the arithmetic / logical / memory action described
; in the Description field above.
; - Write results to the destination register(s); update any
; status bits enumerated under Status-Register Effects.
; Consult the IBM AIX reference link under IBM Reference for
; canonical PPC-style pseudocode where xenia's expression is
; terse.
C Translation Example
/* C translation: the xenia-rs interpreter arm below in */
/* Implementation References is the authoritative semantic */
/* snapshot. Translate it line-by-line: */
/* - ctx.gpr[N] -> r[N] (or f[]/v[] for FPRs/VRs) */
/* - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be */
/* - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v) */
/* - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO */
/* The Register Effects and Status-Register Effects tables above */
/* enumerate every side effect a faithful translation must emit. */
Implementation References
mftb
- xenia-canary XML:
tools/ppc-instructions.xml— search formnem="mftb" - xenia-canary emit:
src/xenia/cpu/ppc/ppc_emit_control.cc:719 - xenia-rs opcode:
crates/xenia-cpu/src/opcode.rs:53 - xenia-rs decoder:
crates/xenia-cpu/src/decoder.rs:803 - xenia-rs interpreter:
crates/xenia-cpu/src/interpreter.rs:1664-1672
xenia-rs interpreter body (frozen snapshot)
PpcOpcode::mftb => {
let tbr = instr.spr();
ctx.gpr[instr.rd()] = match tbr {
268 => ctx.timebase & 0xFFFF_FFFF,
269 => ctx.timebase >> 32,
_ => 0,
};
ctx.pc += 4;
}
Special Cases & Edge Conditions
-
Time-base register selectors. The 10-bit
tbrfield encodes the same way asmfspr'ssprfield (two halves swapped). The two values defined for the Xenon:Decoded Name Meaning 268 TBL Time Base, lower 32 bits 269 TBU Time Base, upper 32 bits Other selectors return 0 in xenia and are not used by titles.
-
Atomic 64-bit read pattern. Because
mftbreads only 32 bits at a time, software performs the canonical retry loop to avoid TBL→TBU rollover skew:retry: mftbu rH ; read upper mftb rL ; read lower (TBR=268) mftbu rH2 ; read upper again cmpw rH, rH2 bne retry -
Xenon clock rate. Real hardware ticks the time base at ~3.2 GHz (one tick per CPU clock divided by the architectural ratio). The PVR signature the kernel exposes (
0x00710800) and the kernel-reported tick rate jointly let titles convert TB ticks to seconds. -
xenia behaviour. xenia-rs stores
ctx.timebaseas au64and increments it once per interpreted instruction, not per real-time wall clock. This guarantees deterministic replay (same trace ⇒ same TB readings) at the cost of decoupling guest time from host time. Games that rely on TB for real-time sync will run faster or slower depending on host throughput. -
mftb RT(no operand) is the simplified mnemonic formftb RT, 268— read the lower half.mftbu RT≡mftb RT, 269. -
Deprecated alternative.
mfspr RT, 268/269works on the Xenon (xenia accepts both) but post-PowerISA v2.06 deprecated reading TB throughmfspr. Prefermftb.
Related Instructions
mfspr— generic SPR read; can also read TBL/TBU on Xenon (deprecated).mtspr— TBL/TBU writes are privileged; not user-accessible.isync— context-synchronising fence sometimes paired withmftbfor tight measurement loops.
Simplified Mnemonics
| Simplified | Expansion | Notes |
|---|---|---|
mftb RT |
mftb RT, 268 |
read TBL |
mftbu RT |
mftb RT, 269 |
read TBU |
IBM Reference
- AIX 7.3 —
mftb(Move from Time Base) - PowerISA v2.07B, Book II §6.1 — Time Base description and the canonical 64-bit read sequence.