10dc260f0c
CONSOLIDATION.md Phase 6. Both lived untracked in the project root -- on one
disk, backed up by nothing.
tools/ppc-manual/ 393 files, 3.7 MB. 455 instructions, 350 family pages,
598 mnemonics resolvable through index.json, plus the
generator that produced them.
tools/run-canary.sh the oracle launcher.
🔴 THE LAUNCHER WAS BROKEN IN TWO WAYS AND IS REWRITTEN, not copied:
* it pointed at `xenia-rs/sylpheed.iso`, a SYMLINK. Wine cannot resolve one
and says "path invalid", which reads as a corrupt image rather than a path
problem -- it has cost a session before. It now points at the real file and
warns if handed a symlink.
* it hardcoded one machine's absolute paths, and named `xenia-rs`, which this
consolidation retires. Now derived from the script's own location, with
SYLPH_CANARY_BIN / SYLPH_ISO overrides and a check that each exists.
The standing constraints are in its header where someone will read them: one
emulator at a time, Canary runs MUTED, and never judge a crash or a hang from
a Bash-launched run -- a SIGKILL that looked like the binary was the editor's
process supervisor.
⚠️ The manual's GENERATOR reads the xenia-rs source tree, which is going away.
Its decoder now lives here as crates/sylpheed-ppc, so the generator must be
repointed before it is run again. Recorded in the README rather than left for
someone to discover; the manual's content is checked in and regenerates from
nothing implicitly.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
2.0 KiB
2.0 KiB
Form VX128_1 — VX128_1 — VMX128 vector load/store
Bit Layout
| Bits | Field | Meaning |
|---|---|---|
| 0–5 | OPCD |
primary opcode (4) |
| 6–10 | VD128l |
destination low 5 bits |
| 11–15 | RA |
address register |
| 16–20 | RB |
offset register |
| 21–27 | XO |
extended opcode |
| 28–29 | VD128h |
destination high 2 bits |
| 30–31 | — |
reserved |
Instructions Using This Form
| Mnemonic | Opcode | Group | Description |
|---|---|---|---|
lvsl128 |
0x10000003 |
vmx | Load Vector for Shift Left Indexed 128 |
lvsr128 |
0x10000043 |
vmx | Load Vector for Shift Right Indexed 128 |
lvewx128 |
0x10000083 |
memory | Load Vector Element Word Indexed 128 |
lvx128 |
0x100000c3 |
memory | Load Vector Indexed 128 |
stvewx128 |
0x10000183 |
memory | Store Vector Element Word Indexed 128 |
stvx128 |
0x100001c3 |
memory | Store Vector Indexed 128 |
lvxl128 |
0x100002c3 |
memory | Load Vector Indexed LRU 128 |
stvxl128 |
0x100003c3 |
memory | Store Vector Indexed LRU 128 |
lvlx128 |
0x10000403 |
memory | Load Vector Left Indexed 128 |
lvrx128 |
0x10000443 |
memory | Load Vector Right Indexed 128 |
stvlx128 |
0x10000503 |
memory | Store Vector Left Indexed 128 |
stvrx128 |
0x10000543 |
memory | Store Vector Right Indexed 128 |
lvlxl128 |
0x10000603 |
memory | Load Vector Left Indexed LRU 128 |
lvrxl128 |
0x10000643 |
memory | Load Vector Right Indexed LRU 128 |
stvlxl128 |
0x10000703 |
memory | Store Vector Left Indexed LRU 128 |
stvrxl128 |
0x10000743 |
memory | Store Vector Right Indexed LRU 128 |