Sylpheed/tools/ppc-manual/alu/addmex.md

addmex — Add to Minus One Extended

Category: Integer ALU · Form: XO · Opcode: 0x7c0001d4

Assembler Mnemonics

Mnemonic	XML entry	Flags	Description
addme	addmex	—	Add to Minus One Extended
addmeo	addmex	OE=1	Add to Minus One Extended
addme.	addmex	Rc=1	Add to Minus One Extended
addmeo.	addmex	OE=1, Rc=1	Add to Minus One Extended

Syntax

addme[OE][Rc] [RD], [RA]

Encoding

addmex — form XO

• Opcode word: 0x7c0001d4
• Primary opcode (bits 0–5): 31
• Extended opcode: 234
• Synchronising: no

Bits	Field	Meaning
0–5	OPCD	primary opcode (31)
6–10	RT	destination GPR
11–15	RA	source A
16–20	RB	source B
21	OE	overflow-enable flag
22–30	XO	extended opcode (9 bits)
31	Rc	record-form flag

Operands

Field	Role	Description
RA	addmex: read	Source GPR (r0–r31).
CA	addmex: read; addmex: write	XER[CA] carry bit. Read by add-with-carry/subtract-with-borrow instructions, written by carrying instructions.
RD	addmex: write	Destination GPR.
OE	addmex: write (conditional)	Overflow-enable bit. When 1, the instruction updates XER[OV] and stickies XER[SO] on signed overflow.
CR	addmex: write (conditional)	Condition-register update. When Rc=1, CR field 0 (or CR6 for vector compares, CR1 for FPU) is updated from the result.

Register Effects

addmex

• Reads (always): RA, CA
• Reads (conditional): none
• Writes (always): RD, CA
• Writes (conditional): OE, CR

Status-Register Effects

• addmex: CR0 ← signed-compare(result, 0) with SO ← XER[SO], when Rc=1.; XER[OV] ← signed-overflow(result); XER[SO] stickies, when OE=1.; XER[CA] ← carry-out of the add / borrow-in of the subtract (always).

Operation (pseudocode)

RT <- (RA) + CA + 0xFFFF_FFFF_FFFF_FFFF
CA <- carry_out

C Translation Example

/* C translation: the xenia-rs interpreter arm below in           */
/* Implementation References is the authoritative semantic        */
/* snapshot. Translate it line-by-line:                            */
/*   - ctx.gpr[N]  -> r[N]       (or f[]/v[] for FPRs/VRs)        */
/*   - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be   */
/*   - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v)   */
/*   - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO   */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

addmex

• xenia-canary XML: tools/ppc-instructions.xml — search for mnem="addmex"
• xenia-canary emit: src/xenia/cpu/ppc/ppc_emit_alu.cc:152
• xenia-rs opcode: crates/xenia-cpu/src/opcode.rs:8
• xenia-rs decoder: crates/xenia-cpu/src/decoder.rs:873
• xenia-rs interpreter: crates/xenia-cpu/src/interpreter.rs:239-254

xenia-rs interpreter body (frozen snapshot)

        PpcOpcode::addmex => {
            // PPCBUG-016+020: 32-bit truncation. RT = RA + CA - 1.
            let ra32 = ctx.gpr[instr.ra()] as u32;
            let ca = ctx.xer_ca as u32;
            let result32 = ra32.wrapping_add(ca).wrapping_sub(1);
            ctx.xer_ca = if ra32 != 0 || ca != 0 { 1 } else { 0 };
            ctx.gpr[instr.rd()] = result32 as u64;
            if instr.oe() {
                let true_sum = (ra32 as i32 as i128) + (ca as i128) - 1;
                overflow::apply(ctx, true_sum != (result32 as i32) as i128);
            }
            if instr.rc_bit() {
                ctx.update_cr_signed(0, result32 as i32 as i64);
            }
            ctx.pc += 4;
        }

Special Cases & Edge Conditions

• No RB field used. addmex is encoded in XO-form but ignores the RB slot — assemblers must still emit a value (typically zero). Disassemblers that parse a non-zero RB should not flag it as illegal; it is simply unused.
• Operation is RA + CA + (−1), i.e. RA - 1 + CA. Used to terminate a multi-word subtract chain when the high source word is implicitly all-ones (e.g. computing -x as ~x + 1 across 128 bits).
• Carry-out predicate is RA != 0 OR CA != 0. Equivalently, CA' = NOT(RA == 0 AND CA == 0). Adding −1 to anything except a zero-with-no-carry produces a carry-out (no borrow needed). This terse form in xenia-rs is correct but easy to misread.
• Overflow not implemented in xenia-rs. The OE=1 path is silently a no-op; spec says set XER[OV] if the signed result wraps.
• 64-bit CR update on Xenon, 32-bit in xenia-rs. interpreter.rs:139 — same quirk as the rest of the add family.
• XER[CA] must be initialised by an earlier carrying instruction. addme is a terminator, not a seed.

Related Instructions

• addzex — terminate a chain with RA + 0 + CA (no −1).
• addex — middle-of-chain RA + RB + CA.
• addcx — seeds a chain.
• subfmex — subtract dual: ~RA + (−1) + CA.
• negx — single-instruction two's-complement negate.

IBM Reference

• AIX 7.3 — addme (Add to Minus One Extended)