CONSOLIDATION.md Phase 6. Both lived untracked in the project root -- on one
disk, backed up by nothing.
tools/ppc-manual/ 393 files, 3.7 MB. 455 instructions, 350 family pages,
598 mnemonics resolvable through index.json, plus the
generator that produced them.
tools/run-canary.sh the oracle launcher.
🔴 THE LAUNCHER WAS BROKEN IN TWO WAYS AND IS REWRITTEN, not copied:
* it pointed at `xenia-rs/sylpheed.iso`, a SYMLINK. Wine cannot resolve one
and says "path invalid", which reads as a corrupt image rather than a path
problem -- it has cost a session before. It now points at the real file and
warns if handed a symlink.
* it hardcoded one machine's absolute paths, and named `xenia-rs`, which this
consolidation retires. Now derived from the script's own location, with
SYLPH_CANARY_BIN / SYLPH_ISO overrides and a check that each exists.
The standing constraints are in its header where someone will read them: one
emulator at a time, Canary runs MUTED, and never judge a crash or a hang from
a Bash-launched run -- a SIGKILL that looked like the binary was the editor's
process supervisor.
⚠️ The manual's GENERATOR reads the xenia-rs source tree, which is going away.
Its decoder now lives here as crates/sylpheed-ppc, so the generator must be
repointed before it is run again. Recorded in the README rather than left for
someone to discover; the manual's content is checked in and regenerates from
nothing implicitly.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
5.6 KiB
5.6 KiB
subficx — Subtract From Immediate Carrying
Category: Integer ALU · Form: D · Opcode:
0x20000000
Assembler Mnemonics
| Mnemonic | XML entry | Flags | Description |
|---|---|---|---|
subfic |
subficx |
— | Subtract From Immediate Carrying |
Syntax
subfic [RD], [RA], [SIMM]
Encoding
subficx — form D
- Opcode word:
0x20000000 - Primary opcode (bits 0–5):
8 - Extended opcode: —
- Synchronising: no
| Bits | Field | Meaning |
|---|---|---|
| 0–5 | OPCD |
primary opcode |
| 6–10 | RT |
destination GPR (or RS when storing) |
| 11–15 | RA |
source GPR (0 ⇒ literal 0 for RA0 forms) |
| 16–31 | D/SI/UI |
16-bit signed or unsigned immediate |
Operands
| Field | Role | Description |
|---|---|---|
RA |
subficx: read | Source GPR (r0–r31). |
SIMM |
subficx: read | 16-bit signed immediate. Sign-extended to 64 bits before use. |
RD |
subficx: write | Destination GPR. |
CA |
subficx: write | XER[CA] carry bit. Read by add-with-carry/subtract-with-borrow instructions, written by carrying instructions. |
Register Effects
subficx
- Reads (always):
RA,SIMM - Reads (conditional): none
- Writes (always):
RD,CA - Writes (conditional): none
Status-Register Effects
subficx: XER[CA] ← carry-out of the add / borrow-in of the subtract (always).
Operation (pseudocode)
; Pseudocode derives directly from the xenia-rs interpreter
; arm (see Implementation References). Operation semantics:
; - Read source operands from the fields listed under Operands.
; - Apply the arithmetic / logical / memory action described
; in the Description field above.
; - Write results to the destination register(s); update any
; status bits enumerated under Status-Register Effects.
; Consult the IBM AIX reference link under IBM Reference for
; canonical PPC-style pseudocode where xenia's expression is
; terse.
C Translation Example
/* C translation: the xenia-rs interpreter arm below in */
/* Implementation References is the authoritative semantic */
/* snapshot. Translate it line-by-line: */
/* - ctx.gpr[N] -> r[N] (or f[]/v[] for FPRs/VRs) */
/* - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be */
/* - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v) */
/* - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO */
/* The Register Effects and Status-Register Effects tables above */
/* enumerate every side effect a faithful translation must emit. */
Implementation References
subficx
- xenia-canary XML:
tools/ppc-instructions.xml— search formnem="subficx" - xenia-canary emit:
src/xenia/cpu/ppc/ppc_emit_alu.cc:459 - xenia-rs opcode:
crates/xenia-cpu/src/opcode.rs:83 - xenia-rs decoder:
crates/xenia-cpu/src/decoder.rs:333 - xenia-rs interpreter:
crates/xenia-cpu/src/interpreter.rs:155-164
xenia-rs interpreter body (frozen snapshot)
PpcOpcode::subficx => {
// PPCBUG-005: 32-bit ABI. Sign-extended imm has bits 32-63 set for
// negative SIMM, poisoning the writeback. Canary uses 32-bit form.
let ra32 = ctx.gpr[instr.ra()] as u32;
let imm32 = instr.simm16() as i32 as u32;
let result32 = imm32.wrapping_sub(ra32);
ctx.xer_ca = if imm32 >= ra32 { 1 } else { 0 };
ctx.gpr[instr.rd()] = result32 as u64;
ctx.pc += 4;
}
Special Cases & Edge Conditions
RT ← SIMM − RAwithXER[CA]always set. Note the operand order: the immediate is the minuend, not the subtrahend.subfic rD, rA, 1computes1 - rA, useful for negation-plus-one or one's-complement-style operations.- Immediate is sign-extended to 64 bits before the subtract. So
subfic rD, rA, -1computes-1 - rA, equivalent to~rA. XER[CA] = 1whenSIMM >= RA(no borrow). Computed in xenia asif imm >= ra(interpreter.rs:73) — comparing the sign-extended unsigned representations.- No
Rc, noOE. This D-form has no flag bits beyond the implicitCAwrite. - No record-form variant. There is no
subfic.in the ISA; if you need CR0 to also reflect the result, follow with acmpwi. - Synthesised "subtract immediate". Assemblers sometimes accept
subi rD, rA, valueas a shorthand foraddi rD, rA, -value, but for the carry-producing variant you must usesubficexplicitly. - Common idiom:
subfic rD, rA, 0computes-rAand setsCAaccording to whetherrA == 0(no borrow) orrA != 0(borrow). Equivalent tonegxwhenCAdoesn't matter.
Related Instructions
subfcx— XO-form register version.subfx— register subtract withoutXER[CA].addic,addicx— dual: add immediate carrying.negx— equivalent tosubfic rD, rA, 0whenCAis unwanted.