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Sylpheed RE agent 7cd2370372 re: entry_a is a code/data boundary, not an entry -- and the decoder was reading data as code 
Disassembling the three Stage-02 entry_a targets shows opcodes 0x19 and 0x1A, and the
ISL dispatcher's table has 25 entries (cmplwi 0x18).  They are not instructions.  Each
phase region ENDS with a trailing data table of 8-byte typed records -- tag 0x19 = int,
tag 0x1A = IEEE float (0.0, 0.5, 1.0, 4.0) -- and entry_a is where it starts.

Confirmed across the disc: in 44 of 44 phases the first offset whose opcode exceeds
0x18 is exactly that phase's entry_a, with zero exceptions, and only two tags ever
appear (1394 x 0x19, 675 x 0x1A).  So the record is

    0x1883, base, size, 0, code_end, force_end_handler

one boundary and one entry, not two entries as the previous commit said.

That also retires this thread's own "82 of 88 land on a valid instruction = 93.2% vs a
38.6% control" as TOO WEAK a test: a data record has length 8 and passes "nonzero,
even".  The entry_b result stands on different evidence -- those targets were matched
against isl.call_sites(), an independent enumeration.

isl.linear_offsets was decoding all 2069 data records as instructions, 1.23% of the
stream.  Now each phase's walk stops at its boundary:

  decoded instructions   168251 -> 166182  (= 168251 - 2069, as predicted)
  opcode > 0x18               2069 -> 0
  call sites covered     25705/25705 -> 25705/25705
  exits unreachable                0 -> 0
  conditions unknown             400 -> 400

Recorded because the first attempt at the fix was worse than the bug: it destroyed 36%
of the stream (168251 -> 107596, exits 0 -> 74) because linear_offsets is ONE global
walk from the first phase base, so stopping at phase 1's table lost every later phase.
It has to skip the region and resume at the next base.  A count moving hard in the
wrong direction is the same signal as one that will not move.

Still open: the table's contents are undecoded -- its int values land on the
instruction stream 46/51 against a 29.5% chance rate, but 0 of them are unreached
run-starts, so this is not what starts the unreachable code either.
2026-08-27 06:59:58 +00:00

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# Stage01.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 8083 of 9706 instructions (83.3%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x002B6C: 2 necessary condition(s)
precond 0x002870 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x002AC0 random(2) == 0
## phase 1 — END_PHASE at 0x003178: 7 necessary condition(s)
precond 0x002870 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002BC4 hp_pct_test(ADT101, 0) != 1
precond 0x002C18 hp_pct_test(ADT102, 0) != 1
precond 0x002C6C hp_pct_test(ADT103, 0) != 1
precond 0x002CC0 hp_pct_test(ADT104, 0) != 1
TRIGGER 0x002D98 global[0] != 9
TRIGGER 0x00302C global[4] == 0
## phase 1 — END_PHASE at 0x0033C8: 3 necessary condition(s)
precond 0x002870 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002BC4 hp_pct_test(ADT101, 0) != 1
precond 0x0031D8 read_freg(0) < 600
## phase 1 — FORCE_END_PHASE at 0x00E0B4: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x011B10: 2 necessary condition(s)
precond 0x011814 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x011A64 random(2) == 0
## phase 2 — END_PHASE at 0x012714: 10 necessary condition(s)
precond 0x011814 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x011B70 read_freg(0) < 70
precond 0x011BC4 hp_pct_test(ADT201, 0) != 1
precond 0x011C18 hp_pct_test(ADT202, 0) != 1
precond 0x011C6C hp_pct_test(ADT203, 0) != 1
precond 0x011CC0 hp_pct_test(ADT204, 0) != 1
precond 0x011D14 hp_pct_test(ADT205, 0) != 1
TRIGGER 0x011E38 hp_pct_test(ADS221, 0) != 1
TRIGGER 0x012508 builtin103() != 1
TRIGGER 0x0125C8 global[4] == 0
## phase 2 — END_PHASE at 0x012964: 3 necessary condition(s)
precond 0x011814 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x011B70 read_freg(0) < 70
precond 0x012774 read_freg(0) < 600
## phase 2 — FORCE_END_PHASE at 0x01B828: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage02.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 15650 of 18568 instructions (84.3%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x0051E4: 2 necessary condition(s)
precond 0x004D70 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x005110 random(3) == 0
## phase 1 — END_PHASE at 0x005828: 3 necessary condition(s)
precond 0x004D70 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00523C hp_pct_test(TCN004, 0) != 1
TRIGGER 0x00572C random(5) == 0
## phase 1 — END_PHASE at 0x006010: 7 necessary condition(s)
precond 0x004D70 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00523C hp_pct_test(TCN004, 0) != 1
precond 0x005888 read_freg(0) <= 210
precond 0x0058DC hp_pct_test(ADT102, 0) != 1
precond 0x005930 hp_pct_test(ADT107, 0) != 1
precond 0x005984 hp_pct_test(ADT113, 0) != 1
TRIGGER 0x005B3C hp_pct_test(ADN101, 0) != 1
## phase 1 — END_PHASE at 0x006260: 4 necessary condition(s)
precond 0x004D70 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00523C hp_pct_test(TCN004, 0) != 1
precond 0x005888 read_freg(0) <= 210
precond 0x006070 read_freg(0) < 1200
## phase 1 — FORCE_END_PHASE at 0x01482C: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x019640: 2 necessary condition(s)
precond 0x0191CC unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x01956C random(3) == 0
## phase 2 — END_PHASE at 0x019934: 2 necessary condition(s)
precond 0x0191CC unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x019698 hp_pct_test(TCT206, 0) != 1
## phase 2 — END_PHASE at 0x01AC44: 9 necessary condition(s)
precond 0x0191CC unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x019698 hp_pct_test(TCT206, 0) != 1
precond 0x0199C8 builtin7(TCT206, 1, Route_TCT206_p2S, 4294967295, 500) == 1
precond 0x019A8C <unknown> <= 240
precond 0x01A1E4 global[4] == 0
TRIGGER 0x01A2B0 global[4] != 1
TRIGGER 0x01A924 hp_pct_test(TCT206, 89.9) != 0
TRIGGER 0x01AA38 global[104] != 0
TRIGGER 0x01AAF8 global[4] == 0
## phase 2 — FORCE_END_PHASE at 0x0249F0: 0 necessary condition(s)
## phase 3 — END_PHASE at 0x02B96C: 2 necessary condition(s)
precond 0x02B4F8 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x02B898 random(3) == 0
## phase 3 — END_PHASE at 0x02BFB0: 3 necessary condition(s)
precond 0x02B4F8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x02B9C4 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x02BEB4 random(5) == 0
## phase 3 — END_PHASE at 0x02C1E0: 3 necessary condition(s)
precond 0x02B4F8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x02B9C4 hp_pct_test(TCN004, 0) != 1
precond 0x02BFC8 global[112] < 4
## phase 3 — END_PHASE at 0x02CF74: 16 necessary condition(s)
precond 0x02B4F8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x02B9C4 hp_pct_test(TCN004, 0) != 1
precond 0x02BFC8 global[112] < 4
precond 0x02C240 read_freg(0) <= 300
precond 0x02C294 hp_pct_test(ADT301, 0) != 1
precond 0x02C2E8 hp_pct_test(ADT302, 0) != 1
precond 0x02C33C hp_pct_test(ADT303, 0) != 1
precond 0x02C390 hp_pct_test(ADT304, 0) != 1
precond 0x02C3E4 hp_pct_test(ADT305, 0) != 1
precond 0x02C438 hp_pct_test(ADT306, 0) != 1
precond 0x02C48C hp_pct_test(ADT307, 0) != 1
precond 0x02C4E0 hp_pct_test(ADT308, 0) != 1
TRIGGER 0x02C5C4 global[112] != 0
TRIGGER 0x02CC0C global[112] != 0
TRIGGER 0x02CDC8 global[4] == 0
TRIGGER 0x02CE9C global[112] != 0
## phase 3 — END_PHASE at 0x02D1DC: 5 necessary condition(s)
precond 0x02B4F8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x02B9C4 hp_pct_test(TCN004, 0) != 1
precond 0x02BFC8 global[112] < 4
precond 0x02C240 read_freg(0) <= 300
precond 0x02CFD4 read_freg(0) < 1200
## phase 3 — FORCE_END_PHASE at 0x034A10: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage03.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 8272 of 10895 instructions (75.9%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x003924: 2 necessary condition(s)
precond 0x0034B0 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x003850 random(3) == 0
## phase 1 — END_PHASE at 0x003F68: 3 necessary condition(s)
precond 0x0034B0 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00397C hp_pct_test(TCN004, 0) != 1
TRIGGER 0x003E6C random(5) == 0
## phase 1 — END_PHASE at 0x004688: 12 necessary condition(s)
precond 0x0034B0 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00397C hp_pct_test(TCN004, 0) != 1
precond 0x003FC8 read_freg(0) < 210
precond 0x00401C hp_pct_test(ADT101, 0) != 1
precond 0x004070 hp_pct_test(ADT102, 0) != 1
precond 0x0040C4 hp_pct_test(ADT103, 0) != 1
precond 0x004118 hp_pct_test(ADT104, 0) != 1
precond 0x00416C hp_pct_test(ADT105, 0) != 1
precond 0x0041C0 hp_pct_test(ADT106, 0) != 1
precond 0x004214 hp_pct_test(ADT107, 0) != 1
TRIGGER 0x0043D0 unit_state(TCN106, 0) != 1
TRIGGER 0x00453C global[8] == 0
## phase 1 — END_PHASE at 0x0048D8: 4 necessary condition(s)
precond 0x0034B0 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00397C hp_pct_test(TCN004, 0) != 1
precond 0x003FC8 read_freg(0) < 210
precond 0x0046E8 read_freg(0) < 600
## phase 1 — FORCE_END_PHASE at 0x009FF4: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x00E1B8: 2 necessary condition(s)
precond 0x00DD44 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x00E0E4 random(3) == 0
## phase 2 — END_PHASE at 0x00E7FC: 3 necessary condition(s)
precond 0x00DD44 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00E210 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x00E700 random(5) == 0
## phase 2 — END_PHASE at 0x00EA04: 3 necessary condition(s)
precond 0x00DD44 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00E210 hp_pct_test(TCN004, 0) != 1
precond 0x00E814 global[44] != 3
## phase 2 — END_PHASE at 0x00F5A8: 9 necessary condition(s)
precond 0x00DD44 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00E210 hp_pct_test(TCN004, 0) != 1
precond 0x00E814 global[44] != 3
precond 0x00EA28 global[56] != 0
precond 0x00EB5C read_freg(0) < 420
precond 0x00EFC0 global[8] == 0
TRIGGER 0x00F098 global[8] != 2
TRIGGER 0x00F1E4 <unknown> != 1
TRIGGER 0x00F450 global[60] != 1
## phase 2 — FORCE_END_PHASE at 0x014CF8: 0 necessary condition(s)
## phase 3 — END_PHASE at 0x019638: 2 necessary condition(s)
precond 0x0191C4 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x019564 random(3) == 0
## phase 3 — END_PHASE at 0x019C7C: 3 necessary condition(s)
precond 0x0191C4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x019690 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x019B80 random(5) == 0
## phase 3 — END_PHASE at 0x019E84: 3 necessary condition(s)
precond 0x0191C4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x019690 hp_pct_test(TCN004, 0) != 1
precond 0x019C94 global[64] != 4
## phase 3 — END_PHASE at 0x01A6AC: 8 necessary condition(s)
precond 0x0191C4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x019690 hp_pct_test(TCN004, 0) != 1
precond 0x019C94 global[64] != 4
precond 0x019E9C global[76] != 2
TRIGGER 0x019F68 global[64] != 0
TRIGGER 0x019FEC hp_pct_test(ADN301, 0) != 1
TRIGGER 0x01A340 global[80] != 1
TRIGGER 0x01A560 global[8] == 0
## phase 3 — END_PHASE at 0x01AC5C: 8 necessary condition(s)
precond 0x0191C4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x019690 hp_pct_test(TCN004, 0) != 1
precond 0x019C94 global[64] != 4
precond 0x019E9C global[76] != 2
precond 0x01A70C read_freg(0) < 600
TRIGGER 0x01A7E4 global[64] != 0
TRIGGER 0x01A994 global[44] != 0
TRIGGER 0x01AB10 global[8] == 0
## phase 3 — FORCE_END_PHASE at 0x01F510: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage04.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 3605 of 4294 instructions (84.0%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x002B3C: 2 necessary condition(s)
precond 0x002698 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x002A38 random(3) == 0
## phase 1 — END_PHASE at 0x0031B0: 3 necessary condition(s)
precond 0x002698 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002B94 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x003084 random(5) == 0
## phase 1 — END_PHASE at 0x00379C: 8 necessary condition(s)
precond 0x002698 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002B94 hp_pct_test(TCN004, 0) != 1
precond 0x003208 hp_pct_test(ADT101, 0) != 1
precond 0x00325C hp_pct_test(ADT102, 0) != 1
precond 0x0032B0 hp_pct_test(ADT103, 0) != 1
precond 0x003304 hp_pct_test(ADT106, 0) != 1
precond 0x003358 hp_pct_test(ADT107, 0) != 1
TRIGGER 0x003478 read_freg(0, 0) >= 130
## phase 1 — END_PHASE at 0x003A1C: 4 necessary condition(s)
precond 0x002698 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002B94 hp_pct_test(TCN004, 0) != 1
precond 0x003208 hp_pct_test(ADT101, 0) != 1
precond 0x0037FC read_freg(0) < 600
## phase 1 — FORCE_END_PHASE at 0x0052A4: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x008918: 2 necessary condition(s)
precond 0x008474 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x008814 random(3) == 0
## phase 2 — END_PHASE at 0x008F8C: 3 necessary condition(s)
precond 0x008474 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x008970 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x008E60 random(5) == 0
## phase 2 — END_PHASE at 0x009944: 8 necessary condition(s)
precond 0x008474 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x008970 hp_pct_test(TCN004, 0) != 1
precond 0x008FA4 global[16] != 1
precond 0x008FF8 hp_pct_test(ADT203, 0) != 1
TRIGGER 0x009110 hp_pct_test(ADN201, 0) != 1
TRIGGER 0x009464 global[20] != 1
TRIGGER 0x009660 builtin105(ADT203) != 1
TRIGGER 0x0097C8 global[4] == 0
## phase 2 — END_PHASE at 0x009BC4: 4 necessary condition(s)
precond 0x008474 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x008970 hp_pct_test(TCN004, 0) != 1
precond 0x008FA4 global[16] != 1
precond 0x0099A4 read_freg(0) < 600
## phase 2 — FORCE_END_PHASE at 0x00C9CC: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage05.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 4230 of 5108 instructions (82.8%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x0037C0: 4 necessary condition(s)
TRIGGER 0x002D84 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x002F48 read_freg(0) < 600
TRIGGER 0x00305C unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x0033D4 hp_pct_test(TCN004, 0) != 1
## phase 1 — END_PHASE at 0x003D94: 15 necessary condition(s)
TRIGGER 0x002D84 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x002DD8 hp_pct_test(TCN004, 0) == 1
precond 0x002E34 read_freg(0) < 600
precond 0x0037D8 global[4] != 1
precond 0x00382C hp_pct_test(ADT101, 0) != 1
precond 0x003880 hp_pct_test(ADT102, 0) != 1
precond 0x0038D4 hp_pct_test(ADT103, 0) != 1
precond 0x003928 hp_pct_test(ADT104, 0) != 1
precond 0x00397C hp_pct_test(ADT105, 0) != 1
precond 0x0039D0 hp_pct_test(ADT106, 0) != 1
precond 0x003A24 hp_pct_test(ADT107, 0) != 1
precond 0x003A78 hp_pct_test(ADT108, 0) != 1
precond 0x003ACC hp_pct_test(ADT109, 0) != 1
precond 0x003B20 hp_pct_test(ADT110, 0) != 1
precond 0x003B74 hp_pct_test(ADT111, 0) != 1
## phase 1 — FORCE_END_PHASE at 0x007538: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x00A088: 4 necessary condition(s)
TRIGGER 0x00964C unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x009828 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x009BA0 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x009F20 read_freg(0) < 600
## phase 2 — END_PHASE at 0x00A410: 8 necessary condition(s)
TRIGGER 0x00964C unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x0096A0 hp_pct_test(TCN004, 0) == 1
precond 0x0096FC read_freg(0) < 600
precond 0x00A0A0 global[12] < 4
precond 0x00A0F4 hp_pct_test(ADT205, 0) != 1
precond 0x00A148 hp_pct_test(ADT206, 0) != 1
precond 0x00A19C hp_pct_test(ADT207, 0) != 1
precond 0x00A1F0 hp_pct_test(ADT208, 0) != 1
## phase 2 — FORCE_END_PHASE at 0x00EEF4: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage06.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 8286 of 9391 instructions (88.2%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x003778: 2 necessary condition(s)
precond 0x0032D4 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x003674 random(3) == 0
## phase 1 — END_PHASE at 0x003DF4: 3 necessary condition(s)
precond 0x0032D4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0037D8 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x003CC8 random(5) == 0
## phase 1 — END_PHASE at 0x00407C: 3 necessary condition(s)
precond 0x0032D4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0037D8 hp_pct_test(TCN004, 0) != 1
precond 0x003E5C read_freg(0) < 600
## phase 1 — END_PHASE at 0x0043A8: 5 necessary condition(s)
precond 0x0032D4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0037D8 hp_pct_test(TCN004, 0) != 1
precond 0x003E5C read_freg(0) < 600
precond 0x00409C global[0] < 9
TRIGGER 0x00422C global[4] != 1
## phase 1 — FORCE_END_PHASE at 0x008EFC: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x00C5D4: 2 necessary condition(s)
precond 0x00C130 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x00C4D0 random(3) == 0
## phase 2 — END_PHASE at 0x00CC50: 3 necessary condition(s)
precond 0x00C130 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00C634 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x00CB24 random(5) == 0
## phase 2 — END_PHASE at 0x00CED8: 3 necessary condition(s)
precond 0x00C130 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00C634 hp_pct_test(TCN004, 0) != 1
precond 0x00CCB8 read_freg(0) < 600
## phase 2 — END_PHASE at 0x00D8A8: 16 necessary condition(s)
precond 0x00C130 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00C634 hp_pct_test(TCN004, 0) != 1
precond 0x00CCB8 read_freg(0) < 600
precond 0x00CF3C unit_state(ADT215) == 0
precond 0x00CF94 unit_state(ADT217) != 0
precond 0x00CFF0 hp_pct_test(ADT201, 0) != 1
precond 0x00D044 hp_pct_test(ADT208, 0) != 1
precond 0x00D098 hp_pct_test(ADT209, 0) != 1
precond 0x00D0EC hp_pct_test(ADT210, 0) != 1
precond 0x00D140 hp_pct_test(ADT211, 0) != 1
precond 0x00D194 hp_pct_test(ADT213, 0) != 1
precond 0x00D1E8 hp_pct_test(ADT215, 0) != 1
precond 0x00D23C hp_pct_test(ADT217, 0) != 1
TRIGGER 0x00D358 unit_state(TCN209, 0) != 1
TRIGGER 0x00D618 squad_survival_pct(TCN205, 99.9) == 1
TRIGGER 0x00D72C global[8] == 0
## phase 2 — FORCE_END_PHASE at 0x010E18: 0 necessary condition(s)
## phase 3 — END_PHASE at 0x013FCC: 2 necessary condition(s)
precond 0x013B28 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x013EC8 random(3) == 0
## phase 3 — END_PHASE at 0x014640: 3 necessary condition(s)
precond 0x013B28 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x014024 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x014514 random(5) == 0
## phase 3 — END_PHASE at 0x014ECC: 7 necessary condition(s)
precond 0x013B28 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x014024 hp_pct_test(TCN004, 0) != 1
precond 0x014698 hp_pct_test(ADT301, 0) != 1
precond 0x0146EC hp_pct_test(ADN302, 0) != 1
TRIGGER 0x0148A8 unit_state(TCN306, 0) != 1
TRIGGER 0x0149F0 hp_pct_test(ADT301, 0) != 1
TRIGGER 0x014D50 global[8] == 0
## phase 3 — END_PHASE at 0x01514C: 4 necessary condition(s)
precond 0x013B28 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x014024 hp_pct_test(TCN004, 0) != 1
precond 0x014698 hp_pct_test(ADT301, 0) != 1
precond 0x014F2C read_freg(0) < 1200
## phase 3 — FORCE_END_PHASE at 0x01B31C: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage07.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 7195 of 7967 instructions (90.3%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x002B38: 2 necessary condition(s)
precond 0x002750 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x002A48 random(2) == 0
## phase 1 — END_PHASE at 0x0031B4: 3 necessary condition(s)
precond 0x002750 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002B98 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x003088 random(5) == 0
## phase 1 — END_PHASE at 0x003434: 3 necessary condition(s)
precond 0x002750 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002B98 hp_pct_test(TCN004, 0) != 1
precond 0x003214 hp_pct_test(TCN012, 0) != 1
## phase 1 — END_PHASE at 0x0036BC: 4 necessary condition(s)
precond 0x002750 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002B98 hp_pct_test(TCN004, 0) != 1
precond 0x003214 hp_pct_test(TCN012, 0) != 1
precond 0x00349C read_freg(0) < 600
## phase 1 — END_PHASE at 0x003B34: 7 necessary condition(s)
precond 0x002750 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002B98 hp_pct_test(TCN004, 0) != 1
precond 0x003214 hp_pct_test(TCN012, 0) != 1
precond 0x00349C read_freg(0) < 600
precond 0x0036DC global[0] < 7
TRIGGER 0x0037FC read_freg(0, 0) >= 300
TRIGGER 0x0039B8 global[8] != 1
## phase 1 — FORCE_END_PHASE at 0x00976C: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x00D168: 2 necessary condition(s)
precond 0x00CD80 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x00D078 random(2) == 0
## phase 2 — END_PHASE at 0x00D7E4: 3 necessary condition(s)
precond 0x00CD80 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00D1C8 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x00D6B8 random(5) == 0
## phase 2 — END_PHASE at 0x00DA64: 3 necessary condition(s)
precond 0x00CD80 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00D1C8 hp_pct_test(TCN004, 0) != 1
precond 0x00D844 hp_pct_test(TCT012, 0) != 1
## phase 2 — END_PHASE at 0x00ECD8: 25 necessary condition(s)
precond 0x00CD80 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00D1C8 hp_pct_test(TCN004, 0) != 1
precond 0x00D844 hp_pct_test(TCT012, 0) != 1
precond 0x00DAC4 hp_pct_test(ADN201, 0) != 1
precond 0x00DB18 hp_pct_test(ADN202, 0) != 1
precond 0x00DB6C hp_pct_test(ADN204, 0) != 1
precond 0x00DBC0 hp_pct_test(ADN205, 0) != 1
precond 0x00DC14 hp_pct_test(ADN209, 0) != 1
precond 0x00DC68 hp_pct_test(ADN211, 0) != 1
precond 0x00DCBC hp_pct_test(ADN214, 0) != 1
precond 0x00DD10 hp_pct_test(ADN215a, 0) != 1
precond 0x00DD64 hp_pct_test(ADN215b, 0) != 1
precond 0x00DDB8 hp_pct_test(ADN216, 0) != 1
precond 0x00DE0C hp_pct_test(ADN220, 0) == 1
precond 0x00DEB8 hp_pct_test(ADN221, 0) == 1
precond 0x00DF64 hp_pct_test(ADN222, 0) == 1
precond 0x00E010 hp_pct_test(ADN223, 0) == 1
precond 0x00E0BC hp_pct_test(ADN224, 0) == 1
precond 0x00E168 hp_pct_test(ADN230, 0) == 1
precond 0x00E214 hp_pct_test(ADN231, 0) == 1
precond 0x00E2C0 hp_pct_test(ADN232, 0) == 1
precond 0x00E36C hp_pct_test(ADN233, 0) == 1
TRIGGER 0x00E418 hp_pct_test(ADN234, 0) == 1
TRIGGER 0x00E690 squad_survival_pct(TCN004, 99.9) != 0
TRIGGER 0x00EB5C global[16] != 1
## phase 2 — END_PHASE at 0x00F4C0: 7 necessary condition(s)
precond 0x00CD80 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00D1C8 hp_pct_test(TCN004, 0) != 1
precond 0x00D844 hp_pct_test(TCT012, 0) != 1
precond 0x00DAC4 hp_pct_test(ADN201, 0) != 1
precond 0x00ED40 read_freg(0) < 600
TRIGGER 0x00EF18 squad_survival_pct(TCN004, 99.9) != 0
TRIGGER 0x00F344 global[16] != 1
## phase 2 — FORCE_END_PHASE at 0x017104: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage08.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 6526 of 7494 instructions (87.1%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x0041EC: 2 necessary condition(s)
TRIGGER 0x003594 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x0037C4 unit_hp_pct(TCN001, Character_Player_Test) != 0
## phase 1 — END_PHASE at 0x004DF4: 12 necessary condition(s)
TRIGGER 0x003594 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x0035E8 hp_pct_test(TCN104, 0) == 1
TRIGGER 0x00363C hp_pct_test(TCN012, 0) == 1
precond 0x003698 read_freg(0) < 600
precond 0x00420C global[8] != 1
precond 0x004220 global[12] != 1
precond 0x004234 global[16] != 1
precond 0x004248 global[20] != 1
precond 0x00425C global[24] != 1
TRIGGER 0x004458 hp_pct_test(TCN012, 99.9) != 0
TRIGGER 0x00457C hp_pct_test(ADN102, 0) != 1
TRIGGER 0x004C78 global[4] != 1
## phase 1 — FORCE_END_PHASE at 0x00C980: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x00FB10: 2 necessary condition(s)
TRIGGER 0x00EEB8 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x00F0E8 unit_hp_pct(TCN001, Character_Player_Test) != 0
## phase 2 — END_PHASE at 0x010EA4: 17 necessary condition(s)
TRIGGER 0x00EEB8 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x00EF0C hp_pct_test(TCN004, 0) == 1
TRIGGER 0x00EF60 hp_pct_test(TCN012, 0) == 1
precond 0x00EFBC read_freg(0) < 600
precond 0x00FB70 hp_pct_test(ADN205, 0) != 1
precond 0x00FBC4 hp_pct_test(ADN206, 0) != 1
precond 0x00FC18 hp_pct_test(ADN207, 0) != 1
precond 0x00FC6C hp_pct_test(ADN208, 0) != 1
precond 0x00FCC0 hp_pct_test(ADN209, 0) != 1
precond 0x00FD14 hp_pct_test(ADN210, 0) != 1
TRIGGER 0x00FE50 hp_pct_test(ADN202, 0, 0) != 1
TRIGGER 0x0104E4 squad_survival_pct(TCN004, 99.9) != 0
TRIGGER 0x010974 unit_alive(TCN005) != 1
TRIGGER 0x010A24 unit_alive(TCN006) != 1
TRIGGER 0x010B4C unit_alive(TCN013) != 1
TRIGGER 0x010C38 hp_pct_test(TCN012, 99.9) != 0
TRIGGER 0x010D28 global[28] != 1
## phase 2 — FORCE_END_PHASE at 0x015A80: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage09.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 8894 of 9939 instructions (89.5%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x003990: 2 necessary condition(s)
precond 0x0035D8 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x0038D0 random(2) == 0
## phase 1 — END_PHASE at 0x003BD8: 2 necessary condition(s)
precond 0x0035D8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0039E8 hp_pct_test(TCN008, 0) != 1
## phase 1 — END_PHASE at 0x00421C: 4 necessary condition(s)
precond 0x0035D8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0039E8 hp_pct_test(TCN008, 0) != 1
precond 0x003C30 hp_pct_test(TCN104, 0) != 1
TRIGGER 0x004120 random(5) == 0
## phase 1 — END_PHASE at 0x0049AC: 7 necessary condition(s)
precond 0x0035D8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0039E8 hp_pct_test(TCN008, 0) != 1
precond 0x003C30 hp_pct_test(TCN104, 0) != 1
precond 0x004234 global[0] != 11
TRIGGER 0x0043F4 read_freg(0, 0) >= 300
TRIGGER 0x004540 unit_state(TCN104) != 1
TRIGGER 0x004860 global[4] == 0
## phase 1 — END_PHASE at 0x004BFC: 5 necessary condition(s)
precond 0x0035D8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0039E8 hp_pct_test(TCN008, 0) != 1
precond 0x003C30 hp_pct_test(TCN104, 0) != 1
precond 0x004234 global[0] != 11
precond 0x004A0C read_freg(0) < 600
## phase 1 — FORCE_END_PHASE at 0x007BF0: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x00AA50: 2 necessary condition(s)
precond 0x00A698 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x00A990 random(2) == 0
## phase 2 — END_PHASE at 0x00AC98: 2 necessary condition(s)
precond 0x00A698 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00AAA8 hp_pct_test(TCN008, 0) != 1
## phase 2 — END_PHASE at 0x00B1B4: 5 necessary condition(s)
precond 0x00A698 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00AAA8 hp_pct_test(TCN008, 0) != 1
precond 0x00ACB0 global[0] != 7
TRIGGER 0x00AE6C unit_state(TCN006) != 1
TRIGGER 0x00B068 global[4] == 0
## phase 2 — END_PHASE at 0x00B79C: 6 necessary condition(s)
precond 0x00A698 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00AAA8 hp_pct_test(TCN008, 0) != 1
precond 0x00ACB0 global[0] != 7
TRIGGER 0x00B23C builtin7(TCN008, 1, Route_TCN008_p2S, 4294967295, 500) == 1
TRIGGER 0x00B454 unit_state(TCN006) != 1
TRIGGER 0x00B650 global[4] == 0
## phase 2 — FORCE_END_PHASE at 0x00F018: 0 necessary condition(s)
## phase 3 — END_PHASE at 0x012204: 2 necessary condition(s)
precond 0x011E4C unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x012144 random(2) == 0
## phase 3 — END_PHASE at 0x01244C: 2 necessary condition(s)
precond 0x011E4C unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x01225C hp_pct_test(TCN008, 0) != 1
## phase 3 — END_PHASE at 0x013100: 24 necessary condition(s)
precond 0x011E4C unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x01225C hp_pct_test(TCN008, 0) != 1
precond 0x0124A4 hp_pct_test(ADT301, 0) != 1
precond 0x0124F8 hp_pct_test(ADT302, 0) != 1
precond 0x012550 unit_state(ADN303) == 1
precond 0x0125A8 unit_state(ADN304) == 1
precond 0x012600 unit_state(ADN305) == 1
precond 0x012658 unit_state(ADN306) == 1
precond 0x0126B0 unit_state(ADN307) == 1
precond 0x012708 unit_state(ADN311) == 1
precond 0x012760 unit_state(ADN312) == 1
precond 0x0127B8 unit_state(ADN313) == 1
precond 0x012810 unit_state(ADN314) == 1
precond 0x012868 unit_state(ADN315) == 1
precond 0x0128C0 unit_state(ADN316) == 1
precond 0x012918 unit_state(ADN317) == 1
precond 0x012970 unit_state(ADN318) == 1
precond 0x0129C8 unit_state(ADN319) == 1
precond 0x012A20 unit_state(ADN320) == 1
precond 0x012A78 unit_state(ADS321) == 1
precond 0x012AD0 unit_state(ADS322) == 1
precond 0x012B28 unit_state(ADS323) == 1
TRIGGER 0x012DCC unit_state(TCN006) != 1
TRIGGER 0x013010 read_freg(global[4]) >= 5
## phase 3 — END_PHASE at 0x013680: 6 necessary condition(s)
precond 0x011E4C unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x01225C hp_pct_test(TCN008, 0) != 1
precond 0x0124A4 hp_pct_test(ADT301, 0) != 1
TRIGGER 0x013118 global[28] == 1
TRIGGER 0x013290 unit_state(TCN006) != 1
TRIGGER 0x013534 global[4] == 0
## phase 3 — FORCE_END_PHASE at 0x01CA54: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage10.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 2544 of 2715 instructions (93.7%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x001310: 2 necessary condition(s)
precond 0x000FE4 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x001234 random(1) == 0
## phase 1 — END_PHASE at 0x001590: 2 necessary condition(s)
precond 0x000FE4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x001370 read_freg(0) < 600
## phase 1 — END_PHASE at 0x001BA8: 6 necessary condition(s)
precond 0x000FE4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x001370 read_freg(0) < 600
precond 0x0015E8 hp_pct_test(ADT001, 0) != 1
TRIGGER 0x001708 read_freg(0, 0) > 300
TRIGGER 0x001918 hp_pct_test(TCN001, 99.9) != 0
TRIGGER 0x001A2C global[4] == 0
## phase 1 — FORCE_END_PHASE at 0x007CF4: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage11.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 6728 of 7176 instructions (93.8%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x001EBC: 2 necessary condition(s)
precond 0x001AD4 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x001DCC random(2) == 0
## phase 1 — END_PHASE at 0x002538: 3 necessary condition(s)
precond 0x001AD4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x001F1C hp_pct_test(TCN004, 0) != 1
TRIGGER 0x00240C random(5) == 0
## phase 1 — END_PHASE at 0x0027C0: 3 necessary condition(s)
precond 0x001AD4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x001F1C hp_pct_test(TCN004, 0) != 1
precond 0x0025A0 read_freg(0) < 600
## phase 1 — END_PHASE at 0x002A00: 4 necessary condition(s)
precond 0x001AD4 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x001F1C hp_pct_test(TCN004, 0) != 1
precond 0x0025A0 read_freg(0) < 600
precond 0x0027E0 global[0] < 10
## phase 1 — FORCE_END_PHASE at 0x00A684: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x00C488: 2 necessary condition(s)
precond 0x00C0A0 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x00C398 random(2) == 0
## phase 2 — END_PHASE at 0x00CB04: 3 necessary condition(s)
precond 0x00C0A0 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00C4E8 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x00C9D8 random(5) == 0
## phase 2 — END_PHASE at 0x00CD8C: 3 necessary condition(s)
precond 0x00C0A0 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00C4E8 hp_pct_test(TCN004, 0) != 1
precond 0x00CB6C read_freg(0) < 600
## phase 2 — END_PHASE at 0x00D214: 6 necessary condition(s)
precond 0x00C0A0 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x00C4E8 hp_pct_test(TCN004, 0) != 1
precond 0x00CB6C read_freg(0) < 600
precond 0x00CDAC global[8] < 6
TRIGGER 0x00CFA8 hp_pct_test(TCN004, 99.9) != 0
TRIGGER 0x00D098 global[4] != 1
## phase 2 — FORCE_END_PHASE at 0x014728: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage12.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 6141 of 6567 instructions (93.5%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x003FE4: 2 necessary condition(s)
TRIGGER 0x00323C unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x0034C0 unit_hp_pct(TCN001, Character_Player_Test) != 0
## phase 1 — END_PHASE at 0x005390: 10 necessary condition(s)
TRIGGER 0x00323C unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x003290 hp_pct_test(TCN004, 0) == 1
TRIGGER 0x0032E4 hp_pct_test(TCN006, 0) == 1
TRIGGER 0x003338 hp_pct_test(TCN008, 0) == 1
precond 0x003394 read_freg(0) <= 1200
precond 0x004004 global[4] != 1
TRIGGER 0x0040E8 global[8] != 1
TRIGGER 0x0041DC <unknown> != 1
TRIGGER 0x00435C hp_pct_test(ADN001, 0) != 1
TRIGGER 0x005214 global[12] != 1
## phase 1 — FORCE_END_PHASE at 0x012824: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage13.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 4217 of 5173 instructions (81.5%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x003D60: 2 necessary condition(s)
TRIGGER 0x003268 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x00343C unit_hp_pct(TCN001, Character_Player_Test) != 0
## phase 1 — END_PHASE at 0x006998: 15 necessary condition(s)
TRIGGER 0x003268 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x0032BC hp_pct_test(TCN004, 0) == 1
precond 0x003310 hp_pct_test(TCN006, 0) != 1
precond 0x003DC0 hp_pct_test(TCN009, 0) == 1
TRIGGER 0x004FB0 hp_pct_test(ADN001, 0) != 1
TRIGGER 0x005CB8 unit_state(TCN009) == 1
TRIGGER 0x005D8C unit_state(TCN010) == 1
TRIGGER 0x005E60 unit_state(TCN011) == 1
TRIGGER 0x00602C unit_state(TCN013) == 1
TRIGGER 0x006100 unit_state(TCN014) == 1
TRIGGER 0x0061D4 unit_state(TCN017) == 1
TRIGGER 0x0062A8 unit_state(TCN018) == 1
TRIGGER 0x00637C unit_state(TCN019) == 1
TRIGGER 0x00640C global[4] != 0
TRIGGER 0x00681C global[8] != 1
## phase 1 — FORCE_END_PHASE at 0x00EAA0: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage14.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 3228 of 3632 instructions (88.9%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x0028C0: 2 necessary condition(s)
precond 0x0024D8 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x0027D0 random(2) == 0
## phase 1 — END_PHASE at 0x002B48: 2 necessary condition(s)
precond 0x0024D8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002928 read_freg(0) < 600
## phase 1 — END_PHASE at 0x0031B0: 10 necessary condition(s)
precond 0x0024D8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002928 read_freg(0) < 600
precond 0x002BA8 hp_pct_test(ADT102, 0) != 1
precond 0x002BFC hp_pct_test(ADT103, 0) != 1
precond 0x002C50 hp_pct_test(ADT104, 0) != 1
precond 0x002CA4 hp_pct_test(ADT105, 0) != 1
precond 0x002CF8 hp_pct_test(ADT108, 0) != 1
precond 0x002D4C hp_pct_test(ADT114, 0) != 1
TRIGGER 0x002E90 read_freg(0) > 300
TRIGGER 0x003034 global[8] != 1
## phase 1 — FORCE_END_PHASE at 0x0061D4: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x008324: 1 necessary condition(s)
precond 0x007FC4 unit_hp_pct(TCN201, Character_Player_Test) != 0
## phase 2 — END_PHASE at 0x0085AC: 2 necessary condition(s)
precond 0x007FC4 unit_hp_pct(TCN201, Character_Player_Test) != 0
precond 0x00838C read_freg(0) < 600
## phase 2 — END_PHASE at 0x008C24: 6 necessary condition(s)
precond 0x007FC4 unit_hp_pct(TCN201, Character_Player_Test) != 0
precond 0x00838C read_freg(0) < 600
precond 0x00860C hp_pct_test(ADT201, 0) != 1
TRIGGER 0x008750 read_freg(0) >= 300
TRIGGER 0x008974 hp_pct_test(TCN201, 99.9) != 0
TRIGGER 0x008AA8 global[8] != 1
## phase 2 — FORCE_END_PHASE at 0x00AA94: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage15.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 6624 of 7963 instructions (83.2%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x004AF4: 2 necessary condition(s)
TRIGGER 0x003FFC unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x0041D0 unit_hp_pct(TCN001, Character_Player_Test) != 0
## phase 1 — END_PHASE at 0x0064A8: 6 necessary condition(s)
TRIGGER 0x003FFC unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x004050 hp_pct_test(TCN004, 0) == 1
precond 0x0040A4 hp_pct_test(TCT006, 0) != 1
TRIGGER 0x004B5C read_freg(0) >= 900
TRIGGER 0x00571C hp_pct_test(ADN101, 0) != 1
TRIGGER 0x00632C global[0] != 1
## phase 1 — FORCE_END_PHASE at 0x00C730: 0 necessary condition(s)
## phase 2 — END_PHASE at 0x010FE0: 2 necessary condition(s)
TRIGGER 0x010388 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x0105B8 unit_hp_pct(TCN001, Character_Player_Test) != 0
## phase 2 — END_PHASE at 0x012740: 12 necessary condition(s)
TRIGGER 0x010388 unit_hp_pct(TCN001, Character_Player_Test) == 0
TRIGGER 0x0103DC hp_pct_test(TCN204, 0) == 1
TRIGGER 0x010430 hp_pct_test(TCN006, 0) == 1
precond 0x01048C read_freg(0) < 1200
precond 0x011040 hp_pct_test(ADT201, 0) != 1
precond 0x011094 hp_pct_test(ADT202, 0) != 1
TRIGGER 0x011190 global[12] != 1
TRIGGER 0x011348 <unknown> >= 10
TRIGGER 0x01143C hp_pct_test(ADN203, 0) != 1
TRIGGER 0x012390 squad_survival_pct(TCN205, 99.9) != 0
TRIGGER 0x0124D4 squad_survival_pct(TCN207, 99.9) != 0
TRIGGER 0x0125C4 global[8] != 1
## phase 2 — FORCE_END_PHASE at 0x017304: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage16.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 775 of 1118 instructions (69.3%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x000988: 2 necessary condition(s)
precond 0x0005A0 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x000898 random(2) == 0
## phase 1 — END_PHASE at 0x000CB0: 2 necessary condition(s)
precond 0x0005A0 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0009F0 read_freg(0) < 600
## phase 1 — END_PHASE at 0x001054: 4 necessary condition(s)
precond 0x0005A0 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0009F0 read_freg(0) < 600
precond 0x000CF8 player_gauge0_test(0) != 1
TRIGGER 0x000D34 player_gauge1_test(0) != 1
## phase 1 — FORCE_END_PHASE at 0x001584: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage18.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 871 of 915 instructions (95.2%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x002958: 1 necessary condition(s)
precond 0x002898 builtin104() != 1
------------------------------------------------------------------------
# Stage19.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 518 of 550 instructions (94.2%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x001950: 1 necessary condition(s)
precond 0x001890 builtin104() != 1
------------------------------------------------------------------------
# Stage20.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 801 of 836 instructions (95.8%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x00261C: 1 necessary condition(s)
precond 0x00255C builtin104() != 1
------------------------------------------------------------------------
# Stage21.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 368 of 401 instructions (91.8%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x001250: 1 necessary condition(s)
precond 0x001190 builtin104() != 1
------------------------------------------------------------------------
# Stage22.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 696 of 728 instructions (95.6%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x00208C: 1 necessary condition(s)
precond 0x001FCC builtin104() != 1
------------------------------------------------------------------------
# Stage23.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 364 of 396 instructions (91.9%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x001208: 1 necessary condition(s)
precond 0x001148 builtin104() != 1
------------------------------------------------------------------------
# Stage24.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 3984 of 4192 instructions (95.0%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x00724C: 18 necessary condition(s)
precond 0x006860 hp_pct_test(ADT101, 0) != 1
precond 0x0068B4 hp_pct_test(ADT102, 0) != 1
precond 0x006908 hp_pct_test(ADT103, 0) != 1
precond 0x00695C hp_pct_test(ADT107, 0) != 1
precond 0x0069B0 hp_pct_test(ADT108, 0) != 1
precond 0x006A04 hp_pct_test(ADT109, 0) != 1
precond 0x006A58 hp_pct_test(ADT110, 0) == 1
precond 0x006B04 hp_pct_test(ADT111, 0) == 1
precond 0x006BB0 hp_pct_test(ADT112, 0) == 1
precond 0x006C5C hp_pct_test(ADT113, 0) == 1
precond 0x006D08 hp_pct_test(ADT114, 0) == 1
precond 0x006DB4 hp_pct_test(ADT115, 0) == 1
precond 0x006E60 hp_pct_test(ADT122, 0) != 1
precond 0x006EB4 hp_pct_test(ADT123, 0) != 1
precond 0x006F08 hp_pct_test(ADT126, 0) == 1
precond 0x006FB4 hp_pct_test(ADT127, 0) != 1
precond 0x007008 hp_pct_test(ADT128, 0) != 1
precond 0x00705C hp_pct_test(ADT129, 0) != 1
## phase 1 — END_PHASE at 0x007678: 3 necessary condition(s)
precond 0x006860 hp_pct_test(ADT101, 0) != 1
precond 0x0072CC unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x0073C8 global[0] >= 100
## phase 1 — END_PHASE at 0x007D24: 4 necessary condition(s)
precond 0x006860 hp_pct_test(ADT101, 0) != 1
precond 0x0072CC unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0076D8 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x0077D4 global[0] >= 100
## phase 1 — END_PHASE at 0x007FA4: 4 necessary condition(s)
precond 0x006860 hp_pct_test(ADT101, 0) != 1
precond 0x0072CC unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0076D8 hp_pct_test(TCN004, 0) != 1
precond 0x007D84 read_freg(0) < 1800
## phase 1 — FORCE_END_PHASE at 0x00C114: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage25.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 9525 of 9884 instructions (96.4%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x0173F4: 2 necessary condition(s)
precond 0x01705C unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x017158 global[0] >= 100
## phase 1 — END_PHASE at 0x017A50: 3 necessary condition(s)
precond 0x01705C unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x017454 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x017550 global[0] >= 100
## phase 1 — END_PHASE at 0x017E48: 4 necessary condition(s)
precond 0x01705C unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x017454 hp_pct_test(TCN004, 0) != 1
precond 0x017AB0 read_freg(0) < 1200
TRIGGER 0x017BAC global[0] >= 100
## phase 1 — FORCE_END_PHASE at 0x01C28C: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage26.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 3820 of 5528 instructions (69.1%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x003D80: 2 necessary condition(s)
precond 0x0039C8 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x003CC0 random_rand(2) == 0
## phase 1 — END_PHASE at 0x0043C4: 3 necessary condition(s)
precond 0x0039C8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x003DD8 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x0042C8 random_rand(5) == 0
## phase 1 — END_PHASE at 0x0045CC: 3 necessary condition(s)
precond 0x0039C8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x003DD8 hp_pct_test(TCN004, 0) != 1
precond 0x0043DC global[0] != 8
## phase 1 — END_PHASE at 0x004960: 5 necessary condition(s)
precond 0x0039C8 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x003DD8 hp_pct_test(TCN004, 0) != 1
precond 0x0043DC global[0] != 8
precond 0x00462C read_freg(0) < 900
TRIGGER 0x004828 global[0] != 0
## phase 1 — FORCE_END_PHASE at 0x00FF5C: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage27.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 2410 of 2973 instructions (81.1%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x0024E0: 2 necessary condition(s)
precond 0x002128 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x002420 random_rand(2) == 0
## phase 1 — END_PHASE at 0x002B24: 3 necessary condition(s)
precond 0x002128 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002538 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x002A28 random_rand(5) == 0
## phase 1 — END_PHASE at 0x002D74: 3 necessary condition(s)
precond 0x002128 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002538 hp_pct_test(TCN004, 0) != 1
precond 0x002B84 read_freg(0) < 1200
## phase 1 — END_PHASE at 0x003850: 22 necessary condition(s)
precond 0x002128 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x002538 hp_pct_test(TCN004, 0) != 1
precond 0x002B84 read_freg(0) < 1200
precond 0x002DCC hp_pct_test(ADN113, 0) != 1
precond 0x002E20 hp_pct_test(ADN114, 0) != 1
precond 0x002E74 hp_pct_test(ADN115, 0) != 1
precond 0x002EC8 hp_pct_test(ADN116, 0) != 1
precond 0x002F1C hp_pct_test(ADN117, 0) != 1
precond 0x002F70 hp_pct_test(ADN118, 0) != 1
precond 0x002FC4 hp_pct_test(ADN119, 0) != 1
precond 0x003018 hp_pct_test(ADN107, 0) != 1
precond 0x00306C hp_pct_test(ADN108, 0) == 1
precond 0x003118 hp_pct_test(ADN109, 0) != 1
precond 0x00316C hp_pct_test(ADN110, 0) != 1
precond 0x0031C0 hp_pct_test(ADN111, 0) != 1
precond 0x003214 hp_pct_test(ADN112, 0) != 1
precond 0x003268 hp_pct_test(ADN101, 0) != 1
precond 0x0032BC hp_pct_test(ADN102, 0) != 1
precond 0x003310 hp_pct_test(ADN103, 0) != 1
precond 0x003364 hp_pct_test(ADN104, 0) != 1
TRIGGER 0x003514 unit_state(TCN005) != 1
TRIGGER 0x003710 hp_pct_test(TCN004, 80) != 1
## phase 1 — FORCE_END_PHASE at 0x0088A0: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage28.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 2168 of 2376 instructions (91.2%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x002488: 2 necessary condition(s)
precond 0x00218C unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x0023DC random_rand(1) == 0
## phase 1 — END_PHASE at 0x0028C0: 4 necessary condition(s)
precond 0x00218C unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0024E0 hp_pct_test(TCN003, 0) != 1
precond 0x002534 hp_pct_test(TCN002, 0) != 1
TRIGGER 0x0026E8 read_freg(0) > 420
## phase 1 — END_PHASE at 0x002C2C: 4 necessary condition(s)
precond 0x00218C unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x0024E0 hp_pct_test(TCN003, 0) != 1
precond 0x002920 read_freg(0) < 1200
TRIGGER 0x002A4C unit_hp_pct(TCN001, ELLEN) != 0
## phase 1 — FORCE_END_PHASE at 0x006F24: 0 necessary condition(s)
------------------------------------------------------------------------
# Stage29.ssb — what each phase exit requires
Generated by `tools/re-capture/isl_report.py phase-guards`.
A condition is listed when it DOMINATES the exit: every path from an
entry to that `END_PHASE` passes through it, so it is NECESSARY for the
phase to end that way. Reachability alone is the wrong query here —
in a poll loop both successors reach the exit.
CFG reached 14758 of 19697 instructions (74.9%).
`precond` = necessary: the exit cannot happen unless it holds.
`TRIGGER` = also SUFFICIENT: once it holds the exit is unavoidable.
An exit with no TRIGGER is not fired by a branch — a timeout exit is
fired by time passing, which is not a property of the graph.
## phase 1 — END_PHASE at 0x010910: 3 necessary condition(s)
precond 0x00CD3C global[56] == 1
precond 0x010548 unit_hp_pct(TCN001, Character_Player_Test) != 0
TRIGGER 0x010644 global[0] >= 100
## phase 1 — END_PHASE at 0x010F6C: 4 necessary condition(s)
precond 0x00CD3C global[56] == 1
precond 0x010548 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x010970 hp_pct_test(TCN004, 0) != 1
TRIGGER 0x010A6C global[0] >= 100
## phase 1 — END_PHASE at 0x0111EC: 4 necessary condition(s)
precond 0x00CD3C global[56] == 1
precond 0x010548 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x010970 hp_pct_test(TCN004, 0) != 1
precond 0x010FCC hp_pct_test(TCT006, 0) != 1
## phase 1 — END_PHASE at 0x011514: 5 necessary condition(s)
precond 0x00CD3C global[56] == 1
precond 0x010548 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x010970 hp_pct_test(TCN004, 0) != 1
precond 0x010FCC hp_pct_test(TCT006, 0) != 1
precond 0x011254 read_freg(0) < 1200
## phase 1 — END_PHASE at 0x011814: 7 necessary condition(s)
precond 0x00CD3C global[56] == 1
precond 0x010548 unit_hp_pct(TCN001, Character_Player_Test) != 0
precond 0x010970 hp_pct_test(TCN004, 0) != 1
precond 0x010FCC hp_pct_test(TCT006, 0) != 1
precond 0x011254 read_freg(0) < 1200
precond 0x011534 global[52] < 14
precond 0x011554 global[60] != 1
## phase 1 — FORCE_END_PHASE at 0x038960: 0 necessary condition(s)
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