6bdbf89ebc
CONSOLIDATION.md Phase 6. Both lived untracked in the project root -- on one
disk, backed up by nothing.
tools/ppc-manual/ 393 files, 3.7 MB. 455 instructions, 350 family pages,
598 mnemonics resolvable through index.json, plus the
generator that produced them.
tools/run-canary.sh the oracle launcher.
🔴 THE LAUNCHER WAS BROKEN IN TWO WAYS AND IS REWRITTEN, not copied:
* it pointed at `xenia-rs/sylpheed.iso`, a SYMLINK. Wine cannot resolve one
and says "path invalid", which reads as a corrupt image rather than a path
problem -- it has cost a session before. It now points at the real file and
warns if handed a symlink.
* it hardcoded one machine's absolute paths, and named `xenia-rs`, which this
consolidation retires. Now derived from the script's own location, with
SYLPH_CANARY_BIN / SYLPH_ISO overrides and a check that each exists.
The standing constraints are in its header where someone will read them: one
emulator at a time, Canary runs MUTED, and never judge a crash or a hang from
a Bash-launched run -- a SIGKILL that looked like the binary was the editor's
process supervisor.
⚠️ The manual's GENERATOR reads the xenia-rs source tree, which is going away.
Its decoder now lives here as crates/sylpheed-ppc, so the generator must be
repointed before it is run again. Recorded in the README rather than left for
someone to discover; the manual's content is checked in and regenerates from
nothing implicitly.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
4.0 KiB
4.0 KiB
Form VX128 — VX128 — VMX128 3-operand (register-fused)
Bit Layout
| Bits | Field | Meaning |
|---|---|---|
| 0–5 | OPCD |
primary opcode (4 or 5) |
| 6–10 | VD128l |
destination low 5 bits |
| 11–15 | VA128l |
source A low 5 bits |
| 16–20 | VB128l |
source B low 5 bits |
| 21 | VA128H |
source A high bit |
| 22 | — |
reserved |
| 23–25 | VC |
optional VC / XO sub-field |
| 26 | VA128h |
source A middle bit |
| 27 | — |
reserved |
| 28–29 | VD128h |
destination high 2 bits |
| 30–31 | VB128h |
source B high 2 bits |
Instructions Using This Form
| Mnemonic | Opcode | Group | Description |
|---|---|---|---|
vaddfp128 |
0x14000010 |
vmx | Vector128 Add Floating Point |
vsubfp128 |
0x14000050 |
vmx | Vector128 Subtract Floating Point |
vmulfp128 |
0x14000090 |
vmx | Vector128 Multiply Floating-Point |
vmaddfp128 |
0x140000d0 |
vmx | Vector128 Multiply Add Floating Point |
vmaddcfp128 |
0x14000110 |
vmx | Vector128 Multiply Add Floating Point |
vnmsubfp128 |
0x14000150 |
vmx | Vector128 Negative Multiply-Subtract Floating Point |
vmsum3fp128 |
0x14000190 |
vmx | Vector128 Multiply Sum 3-way Floating Point |
vmsum4fp128 |
0x140001d0 |
vmx | Vector128 Multiply Sum 4-way Floating-Point |
vpkshss128 |
0x14000200 |
vmx | Vector128 Pack Signed Half Word Signed Saturate |
vand128 |
0x14000210 |
vmx | Vector128 Logical AND |
vpkshus128 |
0x14000240 |
vmx | Vector128 Pack Signed Half Word Unsigned Saturate |
vandc128 |
0x14000250 |
vmx | Vector128 Logical AND with Complement |
vpkswss128 |
0x14000280 |
vmx | Vector128 Pack Signed Word Signed Saturate |
vnor128 |
0x14000290 |
vmx | Vector128 Logical NOR |
vpkswus128 |
0x140002c0 |
vmx | Vector128 Pack Signed Word Unsigned Saturate |
vor128 |
0x140002d0 |
vmx | Vector128 Logical OR |
vpkuhum128 |
0x14000300 |
vmx | Vector128 Pack Unsigned Half Word Unsigned Modulo |
vxor128 |
0x14000310 |
vmx | Vector128 Logical XOR |
vpkuhus128 |
0x14000340 |
vmx | Vector128 Pack Unsigned Half Word Unsigned Saturate |
vsel128 |
0x14000350 |
vmx | Vector128 Conditional Select |
vpkuwum128 |
0x14000380 |
vmx | Vector128 Pack Unsigned Word Unsigned Modulo |
vslo128 |
0x14000390 |
vmx | Vector128 Shift Left Octet |
vpkuwus128 |
0x140003c0 |
vmx | Vector128 Pack Unsigned Word Unsigned Saturate |
vsro128 |
0x140003d0 |
vmx | Vector128 Shift Right Octet |
vrlw128 |
0x18000050 |
vmx | Vector128 Rotate Left Word |
vslw128 |
0x180000d0 |
vmx | Vector128 Shift Left Integer Word |
vsraw128 |
0x18000150 |
vmx | Vector128 Shift Right Arithmetic Word |
vsrw128 |
0x180001d0 |
vmx | Vector128 Shift Right Word |
vmaxfp128 |
0x18000280 |
vmx | Vector128 Maximum Floating Point |
vminfp128 |
0x180002c0 |
vmx | Vector128 Minimum Floating Point |
vmrghw128 |
0x18000300 |
vmx | Vector128 Merge High Word |
vmrglw128 |
0x18000340 |
vmx | Vector128 Merge Low Word |
vupkhsb128 |
0x18000380 |
vmx | Vector128 Unpack High Signed Byte |
vupklsb128 |
0x180003c0 |
vmx | Vector128 Unpack Low Signed Byte |