e5e01e2ac2
Three tests failed on the extracted tree for a reason that was not a port defect: disasm_goldens.rs resolves its fixtures through a relative path to xenia-cpu/tests/golden/, and I had copied the test without the data. The fixtures (base + extended mnemonics, VMX128 registers) and the generator test now live in sylpheed-ppc, and the shim test in sylpheed-xexdb points at them. serde/serde_json become dev-dependencies of sylpheed-ppc, which the fixtures need and the library does not. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
138 lines
3.2 KiB
JSON
138 lines
3.2 KiB
JSON
{
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"rows": [
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{
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"label": "vaddubm v3, v4, v5",
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"raw": "0x10642800",
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"addr": "0x82000000",
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"mnemonic": "vaddubm",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vaddfp v3, v4, v5",
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"raw": "0x1064280A",
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"addr": "0x82000000",
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"mnemonic": "vaddfp",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vand v3, v4, v5",
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"raw": "0x10642C04",
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"addr": "0x82000000",
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"mnemonic": "vand",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vor v3, v4, v5",
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"raw": "0x10642C84",
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"addr": "0x82000000",
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"mnemonic": "vor",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vxor v3, v4, v5",
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"raw": "0x10642CC4",
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"addr": "0x82000000",
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"mnemonic": "vxor",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vsel v3,v4,v5,v6",
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"raw": "0x106429AA",
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"addr": "0x82000000",
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"mnemonic": "vsel",
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"operands": "v3, v4, v5, v6"
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},
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{
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"label": "vperm v3,v4,v5,v6",
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"raw": "0x106429AB",
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"addr": "0x82000000",
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"mnemonic": "vperm",
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"operands": "v3, v4, v5, v6"
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},
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{
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"label": "vmaddfp v3, v4, v6, v5 (swap)",
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"raw": "0x106429AE",
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"addr": "0x82000000",
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"mnemonic": "vmaddfp",
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"operands": "v3, v4, v6, v5"
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},
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{
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"label": "mfvscr v3",
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"raw": "0x10600604",
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"addr": "0x82000000",
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"mnemonic": "mfvscr",
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"operands": "v3"
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},
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{
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"label": "mtvscr v5",
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"raw": "0x10002E44",
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"addr": "0x82000000",
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"mnemonic": "mtvscr",
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"operands": "v5"
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},
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{
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"label": "vperm128 v3, v4, v5, 0 (canary)",
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"raw": "0x14642800",
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"addr": "0x82000000",
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"mnemonic": "vperm128",
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"operands": "v3, v4, v5, 0"
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},
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{
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"label": "vsrw128 v0, v0, v12 (canary, vd_hi=00)",
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"raw": "0x180061D0",
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"addr": "0x82000000",
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"mnemonic": "vsrw128",
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"operands": "v0, v0, v12"
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},
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{
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"label": "vsrw128 v32, v0, v12 (canary, VD128h=01)",
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"raw": "0x180061D4",
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"addr": "0x82000000",
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"mnemonic": "vsrw128",
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"operands": "v32, v0, v12"
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},
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{
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"label": "vpermwi128 v64, v12, 0xE4 (canary, VD128h=10)",
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"raw": "0x180463D8",
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"addr": "0x82000000",
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"mnemonic": "vpermwi128",
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"operands": "v64, v12, 0xE4"
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},
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{
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"label": "vrlimi128 v96, v12, 4, 3 (canary, VD128h=11)",
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"raw": "0x180467DC",
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"addr": "0x82000000",
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"mnemonic": "vrlimi128",
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"operands": "v96, v12, 4, 3"
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},
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{
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"label": "vrlimi128 v127, v95, 4, 3 (canary)",
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"raw": "0x1BE4FFDE",
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"addr": "0x82000000",
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"mnemonic": "vrlimi128",
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"operands": "v127, v95, 4, 3"
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},
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{
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"label": "vmaddfp128 v3, v35, v5, v3",
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"raw": "0x146328F0",
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"addr": "0x82000000",
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"mnemonic": "vmaddfp128",
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"operands": "v3, v35, v5, v3"
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},
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{
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"label": "vmaddcfp128 v3, v35, v3, v5",
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"raw": "0x14632930",
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"addr": "0x82000000",
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"mnemonic": "vmaddcfp128",
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"operands": "v3, v35, v3, v5"
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},
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{
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"label": "vnmsubfp128 v3, v35, v3, v5",
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"raw": "0x14632970",
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"addr": "0x82000000",
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"mnemonic": "vnmsubfp128",
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"operands": "v3, v35, v3, v5"
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}
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]
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}
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