re: the trailing data table is a per-phase TIMELINE of scheduled routines
Decodes the table found at the end of every phase region. Layout:
int N
N x [ int offset ; float t ; int kind ] -- 8-byte typed records,
tag 0x19 int, 0x1A float
1 + 3N matches the record count in every phase measured (Stage 02: 76/40/55
records for N = 25/13/18).
Checks, all independent of each other:
schedule entries disc-wide 675
0x1A float records disc-wide 675 (counted by a different route)
offsets landing on the instruction stream 675/675 = 100.0%
control, random 4-aligned offsets 33.3%
The floats are seconds -- 0, 0.5, 1, 4, 5, 30, 50, 60, 90, 120, 150, 170, 180, 210,
240, 270, 300, 330, 360, 420, 570, 1020, 1080, 1140, 1170 -- and the targets are small
one-shot coroutines that set arguments, call one built-in and end_coroutine. kind is
0 (556) or 5 (119) and is not identified.
Runtime cross-check, recorded as consistency rather than confirmation: the closed
REMAINING OB work measured Stage 02's squadron arrivals at t = 0, 120 and 210 s over
n=5 emulator runs, and all three appear in phase 1's static schedule, with 120 and 210
each appearing TWICE. These are round numbers and phase 1 has ~22 distinct times over
0-1170, so presence alone is not unlikely; the doubling is the sharper detail and was
not predicted in advance.
New artefacts data/isl-stage02-schedule.txt and data/isl-schedule-all.txt with a
committed generator (isl_report.py schedule). calls, phase-ends, conditions and
phase-guards all regenerate byte-identical.
Not settled and said so: kind is unread; the consumer is unread, so the decode rests
on the structural checks above; whether the clock is per-phase or per-mission is an
inference from the layout; and this is NOT what starts the unreachable code -- 0 of
the 675 targets are unreached run-starts, so that ~15% gap stands.
This commit is contained in:
@@ -52,6 +52,23 @@ unknown, what evidence exists, and what the first step would be. Move an item in
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int values hit the stream 46/51 vs 29.5 % chance but **0 are unreached
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run-starts**), and what starts the other ~15 % of code is still unknown.
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* ✅ **(2026-08-27) THE TRAILING DATA TABLE IS A TIMELINE — [structures/isl-schedule](structures/isl-schedule.md).**
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Layout `int N; N x [int offset; float t; int kind]`; `1 + 3N` matches the record
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count in every phase. **675 entries disc-wide — exactly the independently counted
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number of `0x1A` float records — and 675/675 offsets land on the instruction
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stream vs a 33.3 % control.** The floats are SECONDS (0, 0.5, 1, 4, 30, 60, 90,
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120, 150, 180, 210, 240, 300, 420, 1020 …) and the targets are small one-shot
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coroutines (`set args; call builtinN; end_coroutine`). `kind` is 0 (556) or 5
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(119) — unidentified. 🟡 **Runtime cross-check, consistent not conclusive:** the
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closed `REMAINING OB` work measured Stage 02 arrivals at **t = 0, 120, 210 s**
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(n=5 emulator runs); all three are in phase 1's static schedule and **120 and 210
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each appear TWICE** — but the times are round numbers, so presence alone is weak;
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the doubling is the sharper detail. Artefacts `data/isl-stage02-schedule.txt` and
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`data/isl-schedule-all.txt`; the four earlier artefacts regenerate byte-identical.
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🟡 **Still NOT what starts the unreachable code** — 0 of the 675 targets are
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unreached run-starts, so the ~15 % gap stands. The consumer is unread, and whether
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the clock is per-phase or per-mission is an inference from layout, not a read.
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## ✅✅ SOLVED — the mission freeze was a modal sign-in dialog (2026-08-26)
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`XamShowSigninUI` opens a modal dialog and `xeXamDispatchDialog` blocks the
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1012
docs/re/data/isl-schedule-all.txt
Normal file
1012
docs/re/data/isl-schedule-all.txt
Normal file
File diff suppressed because it is too large
Load Diff
68
docs/re/data/isl-stage02-schedule.txt
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68
docs/re/data/isl-stage02-schedule.txt
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@@ -0,0 +1,68 @@
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# Stage02.ssb — phase timelines
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Generated by `tools/re-capture/isl_report.py schedule`.
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Each phase ends with a table of `(routine offset, time in seconds, kind)`.
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56 entries.
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## phase 1 — 25 scheduled routines
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t=0 kind=5 -> 0x002C04
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t=0.5 kind=5 -> 0x002C6C
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t=1 kind=5 -> 0x002CE0
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t=1 kind=0 -> 0x00747C
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t=4 kind=5 -> 0x002D30
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t=30 kind=0 -> 0x00323C
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t=30 kind=0 -> 0x007754
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t=60 kind=0 -> 0x007804
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t=90 kind=0 -> 0x003448
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t=90 kind=0 -> 0x0078B4
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t=120 kind=0 -> 0x003A2C
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t=120 kind=0 -> 0x007964
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t=170 kind=0 -> 0x003F84
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t=170 kind=0 -> 0x007AB4
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t=210 kind=0 -> 0x00461C
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t=210 kind=0 -> 0x007C04
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t=240 kind=0 -> 0x004AF8
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t=240 kind=0 -> 0x007D54
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t=270 kind=0 -> 0x007EA4
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t=300 kind=0 -> 0x007F54
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t=330 kind=0 -> 0x0080A4
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t=1020 kind=0 -> 0x008154
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t=1080 kind=0 -> 0x008204
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t=1140 kind=0 -> 0x0082B4
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t=1170 kind=0 -> 0x008364
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## phase 2 — 13 scheduled routines
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t=0 kind=5 -> 0x0183D4
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t=0.5 kind=5 -> 0x01843C
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t=1 kind=0 -> 0x01F230
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t=4 kind=5 -> 0x0184B0
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t=30 kind=0 -> 0x0186F8
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t=60 kind=0 -> 0x01892C
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t=180 kind=0 -> 0x018B78
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t=240 kind=0 -> 0x018ED4
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t=300 kind=0 -> 0x01F488
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t=330 kind=0 -> 0x01F538
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t=360 kind=0 -> 0x01F5E8
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t=420 kind=0 -> 0x019118
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t=570 kind=0 -> 0x01F698
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## phase 3 — 18 scheduled routines
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t=0 kind=5 -> 0x0289EC
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t=0.5 kind=5 -> 0x028A54
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t=1 kind=0 -> 0x028EC0
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t=1 kind=0 -> 0x02E364
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t=4 kind=5 -> 0x028AC8
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t=5 kind=5 -> 0x028E30
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t=50 kind=0 -> 0x029724
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t=120 kind=0 -> 0x0299C8
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t=120 kind=0 -> 0x02E63C
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t=150 kind=0 -> 0x02A7BC
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t=150 kind=0 -> 0x02E78C
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t=180 kind=0 -> 0x029D14
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t=240 kind=0 -> 0x02E8DC
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t=270 kind=0 -> 0x02E98C
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t=300 kind=0 -> 0x02A92C
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t=300 kind=0 -> 0x02EA3C
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t=330 kind=0 -> 0x02EAEC
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t=360 kind=0 -> 0x02EB9C
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76
docs/re/structures/isl-schedule.md
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76
docs/re/structures/isl-schedule.md
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@@ -0,0 +1,76 @@
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# ✅ Each phase carries a TIMELINE — 675 scheduled routines across the disc
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The trailing data table found at the end of every phase region
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([isl-stream-entry-points](../isl-stream-entry-points.md)) is decoded. It is the
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mission's **scripted event schedule**.
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## Layout
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After the phase's code ends — at the first value of that phase's mission-level
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`0x1883` record — comes a run of 8-byte typed records, tag `0x19` = int,
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`0x1A` = IEEE float:
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```
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int N -- entry count
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N x [ int offset ; float t ; int kind ]
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```
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`1 + 3N` matches the record count in **every** phase measured: Stage 02's three
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phases hold 76, 40 and 55 records for N = 25, 13 and 18.
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## ✅ The checks
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| | |
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|---|---|
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| schedule entries disc-wide | **675** |
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| `0x1A` float records disc-wide | **675** — the same number, independently counted |
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| offsets landing on the instruction stream | **675 / 675 = 100.0 %** |
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| control: random 4-aligned offsets | 33.3 % |
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The float count and the entry count are derived by different routes and agree
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exactly, and every single offset resolves. `kind` is **0** (556) or **5** (119).
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## ✅ The floats are seconds
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The distribution is unmistakable: 0, 0.5, 1, 4, 5, 30, 50, 60, 90, 120, 150,
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170, 180, 210, 240, 270, 300, 330, 360, 420, 570, 1020, 1080, 1140, 1170 …
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mission times, not fractions.
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And the targets are what a schedule would point at — small one-shot coroutines:
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```
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002C04: set.i local[0] = 1
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002C1C: set.i local[4] = 1
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002C34: set.f local[8] = 0.4
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002C50: call builtin106(0x1, 0x1, 0.4)
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002C5C: call end_coroutine
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```
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## 🟡 A runtime cross-check — consistent, and not proof
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The closed `REMAINING OB` work measured, on the emulator over n=5 runs, that
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Stage 02's squadrons arrive at **t = 0, 120 and 210 s**. All three times are in
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phase 1's static schedule, and **120 and 210 each appear twice**, which is what
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two squadrons arriving together would look like.
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⚠️ Stated as consistency rather than confirmation: these are round numbers, and
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phase 1 has ~22 distinct times spread over 0–1170, so three specified round
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values all being present is not by itself unlikely. The **doubling** is the
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sharper detail, and it was not predicted in advance.
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## Artefacts
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`data/isl-stage02-schedule.txt` and `data/isl-schedule-all.txt` (all 28 stages,
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675 entries), generator `isl_report.py schedule`. The four earlier artefacts
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regenerate byte-identical.
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## 🟡 Not settled
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* **`kind` (0 or 5) is not identified.** Two behaviours, no reading.
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* **This is not what starts the unreachable code.** All 675 targets are already
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reachable — **0 are unreached run-starts** — so the ~15 % gap stands.
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* **Whether the schedule is per-phase-clock or mission-clock** is not
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established; each phase's table restarts at t=0, which suggests per-phase, but
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that is an inference from the layout, not a read of the consumer.
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* **The consumer is unread.** Nothing here shows the engine walking this table;
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the decode rests on the structural checks above.
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