test_fcmpo_1_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_2_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_3_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_4_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_5_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_6_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_7_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_8_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_9_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_10_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_11_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_12_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_13_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_14_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_15_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_16_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_17_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_18_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_19_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_20_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_21_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_22_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_23_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_24_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_25_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_26_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_27_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_28_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_29_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_30_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_31_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_32_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_33_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_34_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_35_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_36_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_37_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_38_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_39_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_40_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_41_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_42_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_43_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_44_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_45_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_46_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_47_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_48_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_49_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_50_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_51_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_52_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_53_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_54_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_55_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_56_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_57_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_58_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_59_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_60_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_61_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_62_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_63_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_64_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_65_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_66_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_67_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_68_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_69_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_70_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_71_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_72_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_73_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_74_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_75_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_76_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_77_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_78_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_79_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_80_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_81_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_82_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_83_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_84_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_85_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_86_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_87_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_88_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_89_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_90_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_91_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_92_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_93_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_94_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_95_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_96_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_97_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_98_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_99_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_100_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_101_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_102_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_103_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_104_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_105_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_106_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpo_107_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_108_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_109_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_110_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_111_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_112_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_113_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_114_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_115_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_116_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_117_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpo_118_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpo_119_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_120_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_121_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_122_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_123_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_124_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_125_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_126_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_127_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_128_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_129_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_130_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_131_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_132_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_133_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_134_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_135_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_136_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_137_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_138_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_139_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_140_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_141_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_142_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_143_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpo_144_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpo cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

