test_rldiclx_1:
  #_ REGISTER_IN r4 0x123456789ABCDEF0
  rldicl. r3, r4, 8, 56
  blr
  #_ REGISTER_OUT r3 0x0000000000000012
  #_ REGISTER_OUT r4 0x123456789ABCDEF0

test_rldiclx_2:
  #_ REGISTER_IN r4 0x123456789ABCDEF0
  rldicl. r3, r4, 16, 48
  blr
  #_ REGISTER_OUT r3 0x0000000000001234
  #_ REGISTER_OUT r4 0x123456789ABCDEF0

test_rldiclx_3:
  #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
  rldicl. r3, r4, 0, 32
  blr
  #_ REGISTER_OUT r3 0x00000000FFFFFFFF
  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF

test_rldiclx_4:
  #_ REGISTER_IN r4 0x123456789ABCDEF0
  rldicl. r3, r4, 32, 32
  blr
  #_ REGISTER_OUT r3 0x0000000012345678
  #_ REGISTER_OUT r4 0x123456789ABCDEF0
