test_mfspr_xer:
  #_ REGISTER_IN r3 0x0000000000000001
  #_ REGISTER_IN r4 0x0000000000000001
  addc r5, r3, r4
  mfspr r6, xer
  blr
  #_ REGISTER_OUT r3 0x0000000000000001
  #_ REGISTER_OUT r4 0x0000000000000001
  #_ REGISTER_OUT r5 0x0000000000000002
  #_ REGISTER_OUT r6 0x0000000000000000

test_mfspr_lr:
  #_ REGISTER_IN r3 0x0000000012345678
  mflr r5
  mtlr r3
  mfspr r4, lr
  mtlr r5
  blr
  #_ REGISTER_OUT r3 0x0000000012345678
  #_ REGISTER_OUT r4 0x0000000012345678

test_mfspr_ctr:
  #_ REGISTER_IN r3 0x00000000ABCDEF01
  mtctr r3
  mfspr r4, ctr
  blr
  #_ REGISTER_OUT r3 0x00000000ABCDEF01
  #_ REGISTER_OUT r4 0x00000000ABCDEF01
