test_mulhdx_1:
  #_ REGISTER_IN r4 0x0000000100000000
  #_ REGISTER_IN r5 0x0000000100000000
  mulhd. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0x0000000000000001
  #_ REGISTER_OUT r12 0x0000000040000000

test_mulhdx_1_constant:
  lis r4, 0x0001
  sldi r4, r4, 32
  lis r5, 0x0001
  sldi r5, r5, 32
  mulhd. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0x0000000100000000
  #_ REGISTER_OUT r12 0x0000000020000000

test_mulhdx_negative:
  #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
  #_ REGISTER_IN r5 0x0000000000000002
  mulhd. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFFFF
  #_ REGISTER_OUT r12 0x0000000080000000

test_mulhdx_max:
  #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
  #_ REGISTER_IN r5 0xFFFFFFFFFFFFFFFF
  mulhd. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0x0000000000000000
  #_ REGISTER_OUT r12 0x0000000020000000

test_mulhdux_1:
  #_ REGISTER_IN r4 0x0000000100000000
  #_ REGISTER_IN r5 0x0000000100000000
  mulhdu. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0x0000000000000001
  #_ REGISTER_OUT r12 0x0000000040000000

test_mulhdux_max:
  #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
  #_ REGISTER_IN r5 0xFFFFFFFFFFFFFFFF
  mulhdu. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFFFE
  #_ REGISTER_OUT r12 0x0000000080000000

test_mulhwx_1:
  #_ REGISTER_IN r4 0x0000000000010000
  #_ REGISTER_IN r5 0x0000000000010000
  mulhw. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0x0000000000000001
  #_ REGISTER_OUT r12 0x0000000040000000

test_mulhwux_1:
  #_ REGISTER_IN r4 0x0000000000010000
  #_ REGISTER_IN r5 0x0000000000010000
  mulhwu. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0x0000000000000001
  #_ REGISTER_OUT r12 0x0000000040000000

test_mulhwux_max:
  #_ REGISTER_IN r4 0x00000000FFFFFFFF
  #_ REGISTER_IN r5 0x00000000FFFFFFFF
  mulhwu. r3, r4, r5
  mfcr r12
  blr
  #_ REGISTER_OUT r3 0x00000000FFFFFFFE
  #_ REGISTER_OUT r12 0x0000000080000000
