test_fcmpu_1_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_2_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_3_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_4_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_5_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_6_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_7_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_8_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_9_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_10_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_11_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_12_GEN:
  #_ REGISTER_IN f1 0x0000000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_13_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_14_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_15_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_16_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_17_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_18_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_19_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_20_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_21_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_22_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_23_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_24_GEN:
  #_ REGISTER_IN f1 0x8000000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x8000000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_25_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_26_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_27_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_28_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_29_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_30_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_31_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_32_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_33_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_34_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_35_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_36_GEN:
  #_ REGISTER_IN f1 0x0000000000000001
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x0000000000000001
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_37_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_38_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_39_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_40_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_41_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_42_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_43_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_44_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_45_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_46_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_47_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_48_GEN:
  #_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_49_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_50_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_51_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_52_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_53_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_54_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_55_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_56_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_57_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_58_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_59_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_60_GEN:
  #_ REGISTER_IN f1 0x3FF0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x3FF0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_61_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_62_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_63_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_64_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_65_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_66_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_67_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_68_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_69_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_70_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_71_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_72_GEN:
  #_ REGISTER_IN f1 0xBFF0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xBFF0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_73_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_74_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_75_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_76_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_77_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_78_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_79_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_80_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_81_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_82_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_83_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_84_GEN:
  #_ REGISTER_IN f1 0xC1E0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xC1E0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_85_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_86_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_87_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_88_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_89_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_90_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_91_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_92_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_93_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_94_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_95_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_96_GEN:
  #_ REGISTER_IN f1 0x41DFFFFFFFC00000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x41DFFFFFFFC00000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_97_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_98_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_99_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_100_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_101_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_102_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_103_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_104_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_105_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_106_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x04000000

test_fcmpu_107_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_108_GEN:
  #_ REGISTER_IN f1 0x7FF0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0x7FF0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_109_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_110_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_111_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_112_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_113_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_114_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_115_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_116_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_117_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x08000000

test_fcmpu_118_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x02000000

test_fcmpu_119_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_120_GEN:
  #_ REGISTER_IN f1 0xFFF0000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF0000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_121_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_122_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_123_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_124_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_125_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_126_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_127_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_128_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_129_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_130_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_131_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_132_GEN:
  #_ REGISTER_IN f1 0xFFF8000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF8000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_133_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x0000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x0000000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_134_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x8000000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x8000000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_135_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x0000000000000001
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x0000000000000001
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_136_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_137_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x3FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x3FF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_138_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xBFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xBFF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_139_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xC1E0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xC1E0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_140_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x41DFFFFFFFC00000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x41DFFFFFFFC00000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_141_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0x7FF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0x7FF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_142_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xFFF0000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xFFF0000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_143_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xFFF8000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xFFF8000000000000
  #_ REGISTER_OUT cr 0x01000000

test_fcmpu_144_GEN:
  #_ REGISTER_IN f1 0xFFF4000000000000
  #_ REGISTER_IN f2 0xFFF4000000000000
  fcmpu cr1, f1, f2
  blr
  #_ REGISTER_OUT f1 0xFFF4000000000000
  #_ REGISTER_OUT f2 0xFFF4000000000000
  #_ REGISTER_OUT cr 0x01000000

