//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//
// Buffer Definitions: 
//
// cbuffer XeResolveConstants
// {
//
//   uint xe_resolve_edram_info;        // Offset:    0 Size:     4
//   uint xe_resolve_address_info;      // Offset:    4 Size:     4
//   uint xe_resolve_dest_info;         // Offset:    8 Size:     4
//   uint xe_resolve_dest_pitch_aligned;// Offset:   12 Size:     4
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim      ID      HLSL Bind  Count
// ------------------------------ ---------- ------- ----------- ------- -------------- ------
// xe_resolve_source                 texture   uint4         buf      T0             t0      1 
// xe_resolve_dest                       UAV   uint4         buf      U0             u0      1 
// XeResolveConstants                cbuffer      NA          NA     CB0            cb0      1 
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_1
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0
dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0
dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0
dcl_input vThreadID.xy
dcl_temps 6
dcl_thread_group 8, 8, 1
ushr r0.x, CB0[0][0].y, l(7)
bfi r0.x, l(11), l(3), r0.x, l(0)
uge r0.x, vThreadID.x, r0.x
if_nz r0.x
  ret 
endif 
ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0)
mov r0.z, CB0[0][0].y
bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0)
iadd r1.xy, r1.xyxx, vThreadID.xyxx
and r2.xyzw, CB0[0][0].zxzx, l(7, 1023, 0x01000000, 0x40000000)
ubfe r1.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx
uge r0.w, l(3), r0.y
if_nz r0.w
  mov r3.y, r0.y
else 
  ieq r0.w, r0.y, l(5)
  if_nz r0.w
    mov r3.y, l(2)
  else 
    mov r3.y, l(0)
  endif 
endif 
uge r0.yw, r1.wwww, l(0, 2, 0, 1)
and r0.yw, r0.yyyw, l(0, 1, 0, 1)
ishl r0.yw, r1.xxxy, r0.yyyw
ushr r3.x, r3.y, l(1)
and r1.xy, r3.xyxx, l(1, 1, 0, 0)
iadd r0.yw, r0.yyyw, r1.xxxy
udiv r1.xy, null, r0.ywyy, l(80, 16, 0, 0)
ishl r1.w, r1.x, l(1)
imad r1.w, r1.y, r2.y, r1.w
iadd r1.z, r1.w, r1.z
imad r0.yw, -r1.xxxy, l(0, 80, 0, 16), r0.yyyw
imad r0.y, r0.w, l(80), r0.y
ishl r0.y, r0.y, l(1)
imad r0.y, r1.z, l(1280), r0.y
ld r1.xyzw, r0.yyyy, T0[0].xyzw
iadd r0.y, r0.y, l(1)
ld r3.xyzw, r0.yyyy, T0[0].xyzw
if_nz r2.z
  ubfe r0.y, l(4), l(25), CB0[0][0].x
  ieq r0.yw, r0.yyyy, l(0, 5, 0, 7)
  or r0.y, r0.w, r0.y
  if_nz r0.y
    bfi r1.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r1.yxwz, r1.xyzw
    bfi r3.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r3.yxwz, r3.xyzw
  endif 
endif 
if_nz r2.w
  if_z vThreadID.x
    mov r1.xy, r1.zwzz
    mov r3.xy, r3.zwzz
  endif 
  if_z vThreadID.y
    mov r1.xyzw, r3.xyzw
  endif 
endif 
bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0)
iadd r0.xyzw, r0.xyzw, vThreadID.xyyx
bfi r2.y, l(10), l(5), CB0[0][0].w, l(0)
and r2.z, CB0[0][0].z, l(8)
if_nz r2.z
  ubfe r2.z, l(3), l(4), CB0[0][0].z
  ushr r2.w, CB0[0][0].w, l(10)
  ishl r2.w, r2.w, l(5)
  ishr r4.xyzw, r0.zwzw, l(4, 5, 3, 3)
  ishr r5.x, r2.z, l(2)
  ushr r2.w, r2.w, l(4)
  and r2.w, r2.w, l(0x00007ffe)
  imad r2.w, r5.x, r2.w, r4.x
  ushr r4.x, r2.y, l(5)
  imad r2.w, r2.w, r4.x, r4.y
  ishl r4.x, r0.z, l(11)
  and r4.x, r4.x, l(0x00003000)
  bfi r4.x, l(3), l(9), r0.w, r4.x
  ishr r4.x, r4.x, l(6)
  iadd r4.y, r4.z, r5.x
  bfi r4.z, l(1), l(1), r4.y, l(0)
  iadd r4.z, r4.z, r4.w
  bfi r4.z, l(2), l(1), r4.z, l(0)
  bfi r4.y, l(1), l(0), r4.y, r4.z
  and r4.z, r4.x, l(240)
  bfi r5.xy, l(19, 19, 0, 0), l(11, 14, 0, 0), r2.wwww, l(0, 0, 0, 0)
  imad r4.zw, r4.zzzz, l(0, 0, 2, 16), r5.xxxy
  bfi r4.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r4.xxxx, r4.zzwz
  bfi r2.zw, l(0, 0, 2, 2), l(0, 0, 9, 12), r2.zzzz, r4.xxxz
  ubfe r4.x, l(3), l(6), r2.z
  and r4.z, r4.y, l(6)
  bfi r4.y, l(1), l(8), r4.y, l(0)
  imad r4.x, r4.x, l(32), r4.y
  imad r4.x, r4.z, l(4), r4.x
  bfi r2.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r2.zzzw
  bfi r2.w, l(9), l(3), r4.x, r2.w
  bfi r2.z, l(6), l(0), r2.z, r2.w
else 
  ishr r4.xyzw, r0.xyzw, l(5, 5, 2, 3)
  ushr r0.x, r2.y, l(5)
  imad r0.x, r4.y, r0.x, r4.x
  ishl r2.yw, r0.zzzz, l(0, 5, 0, 7)
  and r2.yw, r2.yyyw, l(0, 448, 0, 2048)
  bfi r0.y, l(3), l(3), r0.w, r2.y
  ishl r2.y, r2.y, l(1)
  bfi r0.w, l(3), l(4), r0.w, r2.y
  and r0.w, r0.w, l(992)
  bfi r2.y, l(22), l(10), r0.x, r0.w
  bfi r2.y, l(4), l(0), r0.y, r2.y
  bfi r2.y, l(1), l(4), r0.z, r2.y
  ishl r4.xy, r0.wwww, l(3, 2, 0, 0)
  bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r4.xxxy
  bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx
  bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx
  bfi r0.x, l(12), l(0), r2.w, r0.x
  and r0.y, r0.y, l(1792)
  iadd r0.x, r0.x, r0.y
  and r0.y, r4.z, l(2)
  iadd r0.y, r4.w, r0.y
  bfi r0.y, l(2), l(6), r0.y, l(0)
  iadd r0.x, r0.x, r0.y
  bfi r2.z, l(6), l(0), r2.y, r0.x
endif 
ushr r0.x, r2.z, l(2)
ieq r0.y, r2.x, l(4)
if_nz r0.y
  mov r1.xyzw, r1.yxwz
  mov r0.z, l(2)
else 
  mov r0.z, r2.x
endif 
ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3)
or r0.zw, r2.zzzw, r2.yyyz
if_nz r0.z
  ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8)
  and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
  ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8)
  and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff)
  iadd r1.xyzw, r4.xyzw, r5.xyzw
endif 
if_nz r0.w
  ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16)
  bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw
endif 
store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw
iadd r0.z, r0.x, l(1)
if_nz r0.y
  mov r3.zw, r3.wwwz
  mov r3.xyzw, r3.yxzw
  mov r2.x, l(2)
endif 
ieq r1.xyz, r2.xxxx, l(1, 2, 3, 0)
or r0.yw, r1.yyyz, r1.xxxy
if_nz r0.y
  ishl r1.xyzw, r3.xyzw, l(8, 8, 8, 8)
  and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
  ushr r2.xyzw, r3.xyzw, l(8, 8, 8, 8)
  and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff)
  iadd r3.xyzw, r1.xyzw, r2.xyzw
endif 
if_nz r0.w
  ushr r1.xyzw, r3.xyzw, l(16, 16, 16, 16)
  bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r1.xyzw
endif 
store_uav_typed U0[0].xyzw, r0.zzzz, r3.xyzw
ret 
// Approximately 164 instruction slots used
