//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//
// Buffer Definitions: 
//
// cbuffer XeTextureLoadConstants
// {
//
//   uint xe_texture_load_guest_base;   // Offset:    0 Size:     4
//   uint xe_texture_load_guest_pitch;  // Offset:    4 Size:     4
//   uint xe_texture_load_host_base;    // Offset:    8 Size:     4
//   uint xe_texture_load_host_pitch;   // Offset:   12 Size:     4
//   uint3 xe_texture_load_size_texels; // Offset:   16 Size:    12 [unused]
//   bool xe_texture_load_is_3d;        // Offset:   28 Size:     4
//   uint3 xe_texture_load_size_blocks; // Offset:   32 Size:    12
//   uint xe_texture_load_endianness;   // Offset:   44 Size:     4
//   uint2 xe_texture_guest_storage_width_height;// Offset:   48 Size:     8
//   uint xe_texture_load_guest_format; // Offset:   56 Size:     4
//   uint3 xe_texture_load_guest_mip_offset;// Offset:   64 Size:    12
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim      ID      HLSL Bind  Count
// ------------------------------ ---------- ------- ----------- ------- -------------- ------
// xe_texture_load_source            texture    byte         r/o      T0             t0      1 
// xe_texture_load_dest                  UAV    byte         r/w      U0             u0      1 
// XeTextureLoadConstants            cbuffer      NA          NA     CB0            cb0      1 
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_1
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[0:0][5], immediateIndexed, space=0
dcl_resource_raw T0[0:0], space=0
dcl_uav_raw U0[0:0], space=0
dcl_input vThreadID.xyz
dcl_temps 7
dcl_thread_group 8, 16, 1
ishl r0.x, vThreadID.x, l(1)
mov r0.yz, vThreadID.yyzy
uge r1.xyz, r0.xyzx, CB0[0][2].xyzx
or r0.w, r1.y, r1.x
or r0.w, r1.z, r0.w
if_nz r0.w
  ret 
endif 
iadd r0.xyz, r0.xyzx, CB0[0][4].xyzx
ieq r0.w, CB0[0][0].y, l(-1)
if_nz r0.w
  if_nz CB0[0][1].w
    iadd r1.xyzw, r0.xxxx, l(0, 1, 0, 1)
    ushr r2.xyz, r0.zyyz, l(2, 4, 3, 0)
    ushr r3.xy, CB0[0][3].yxyy, l(4, 5, 0, 0)
    imad r0.w, r2.x, r3.x, r2.y
    iadd r2.x, r2.z, r2.x
    bfi r2.y, l(1), l(1), r2.x, l(0)
    ushr r4.xyzw, r1.zwzw, l(3, 3, 5, 5)
    iadd r2.yz, r2.yyyy, r4.xxyx
    bfi r2.yz, l(0, 2, 2, 0), l(0, 1, 1, 0), r2.yyzy, l(0, 0, 0, 0)
    bfi r2.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r2.xxxx, r2.yzyy
    ishl r2.z, r0.y, l(9)
    and r2.z, r2.z, l(3072)
    bfi r1.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r1.xyzw, r2.zzzz
    ushr r1.xyzw, r1.xyzw, l(6, 6, 6, 6)
    imad r3.xyzw, r0.wwww, r3.yyyy, r4.zwzw
    and r4.xyzw, r1.zwzw, l(48, 48, 48, 48)
    bfi r3.xyzw, l(21, 21, 21, 21), l(9, 9, 12, 12), r3.xyzw, l(0, 0, 0, 0)
    imad r3.xyzw, r4.xyzw, l(2, 2, 16, 16), r3.xyzw
    bfi r1.xyzw, l(4, 4, 4, 4), l(0, 0, 3, 3), r1.xyzw, r3.xyzw
    bfi r1.xyzw, l(2, 2, 2, 2), l(7, 7, 10, 10), r0.zzzz, r1.xyzw
    ubfe r2.zw, l(0, 0, 3, 3), l(0, 0, 6, 6), r1.xxxy
    and r3.xy, r2.xyxx, l(6, 6, 0, 0)
    bfi r2.xy, l(1, 1, 0, 0), l(8, 8, 0, 0), r2.xyxx, l(0, 0, 0, 0)
    imad r2.xy, r2.zwzz, l(32, 32, 0, 0), r2.xyxx
    imad r2.xy, r3.xyxx, l(4, 4, 0, 0), r2.xyxx
    bfi r1.xyzw, l(1, 1, 1, 1), l(4, 4, 7, 7), r0.yyyy, r1.xyzw
    bfi r1.zw, l(0, 0, 9, 9), l(0, 0, 3, 3), r2.xxxy, r1.zzzw
    bfi r1.xy, l(6, 6, 0, 0), l(0, 0, 0, 0), r1.xyxx, r1.zwzz
  else 
    iadd r2.xyzw, r0.xxxx, l(0, 1, 0, 1)
    ushr r3.xyzw, r2.zwzw, l(5, 5, 3, 3)
    ushr r1.zw, r0.yyyy, l(0, 0, 5, 2)
    iadd r0.w, CB0[0][3].x, l(31)
    ushr r0.w, r0.w, l(5)
    imad r4.xyzw, r1.zzzz, r0.wwww, r3.xyxy
    ishl r3.xy, r0.yyyy, l(3, 7, 0, 0)
    and r3.xy, r3.xyxx, l(112, 2048, 0, 0)
    bfi r5.xyzw, l(3, 3, 3, 3), l(1, 1, 1, 1), r2.zwzw, r3.xxxx
    ishl r0.w, r3.x, l(1)
    bfi r2.xyzw, l(3, 3, 3, 3), l(2, 2, 2, 2), r2.xyzw, r0.wwww
    and r2.xyzw, r2.xyzw, l(224, 224, 224, 224)
    bfi r6.xy, l(24, 24, 0, 0), l(8, 8, 0, 0), r4.zwzz, r2.zwzz
    bfi r6.xy, l(4, 4, 0, 0), l(0, 0, 0, 0), r5.zwzz, r6.xyxx
    bfi r6.xy, l(1, 1, 0, 0), l(4, 4, 0, 0), r0.yyyy, r6.xyxx
    ishl r2.xyzw, r2.xyzw, l(3, 3, 2, 2)
    bfi r2.xyzw, l(24, 24, 24, 24), l(11, 11, 10, 10), r4.xyzw, r2.xyzw
    bfi r2.xyzw, l(4, 4, 4, 4), l(3, 3, 2, 2), r5.xyzw, r2.xyzw
    bfi r2.xyzw, l(1, 1, 1, 1), l(7, 7, 6, 6), r0.yyyy, r2.xyzw
    bfi r2.xy, l(12, 12, 0, 0), l(0, 0, 0, 0), r3.yyyy, r2.xyxx
    and r2.zw, r2.zzzw, l(0, 0, 1792, 1792)
    iadd r2.xy, r2.xyxx, r2.zwzz
    and r0.w, r1.w, l(2)
    iadd r1.zw, r0.wwww, r3.zzzw
    bfi r1.zw, l(0, 0, 2, 2), l(0, 0, 6, 6), r1.zzzw, l(0, 0, 0, 0)
    iadd r1.zw, r2.xxxy, r1.zzzw
    bfi r1.xy, l(6, 6, 0, 0), l(0, 0, 0, 0), r6.xyxx, r1.zwzz
  endif 
else 
  ishl r0.x, r0.x, l(1)
  iadd r0.w, CB0[0][2].y, l(31)
  and r0.w, r0.w, l(-32)
  imad r0.y, r0.z, r0.w, r0.y
  imad r0.x, r0.y, CB0[0][0].y, r0.x
  iadd r1.xy, r0.xxxx, l(0, 2, 0, 0)
endif 
iadd r0.xy, r1.xyxx, CB0[0][0].xxxx
ishl r0.xy, r0.xyxx, l(2, 2, 0, 0)
ld_raw r1.xz, r0.x, T0[0].xxyx
ld_raw r1.yw, r0.y, T0[0].xxxy
ushr r0.x, CB0[0][2].w, l(1)
xor r0.x, r0.x, CB0[0][2].w
and r0.x, r0.x, l(1)
if_nz r0.x
  ishl r0.xyzw, r1.xzyw, l(8, 8, 8, 8)
  and r0.xyzw, r0.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
  ushr r2.xyzw, r1.xzyw, l(8, 8, 8, 8)
  and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff)
  iadd r1.xyzw, r0.xzyw, r2.xzyw
endif 
ieq r0.x, CB0[0][3].z, l(3)
if_nz r0.x
  and r0.xyzw, r1.xzyw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0)
  ishl r2.xyzw, r1.xzyw, l(10, 10, 10, 10)
  and r2.xyzw, r2.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00)
  iadd r0.xyzw, r0.xyzw, r2.xyzw
  ushr r2.xyzw, r1.xzyw, l(10, 10, 10, 10)
  and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f)
  iadd r1.xyzw, r0.xzyw, r2.xzyw
else 
  ieq r0.x, CB0[0][3].z, l(4)
  if_nz r0.x
    and r0.xyzw, r1.xzyw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0)
    ishl r2.xyzw, r1.xzyw, l(11, 11, 11, 11)
    and r2.xyzw, r2.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800)
    iadd r0.xyzw, r0.xyzw, r2.xyzw
    ushr r2.xyzw, r1.xzyw, l(11, 11, 11, 11)
    and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f)
    iadd r1.xyzw, r0.xzyw, r2.xzyw
  else 
    ieq r0.x, CB0[0][3].z, l(5)
    if_nz r0.x
      ishl r0.xyzw, r1.xzyw, l(11, 11, 11, 11)
      and r0.xyzw, r0.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800)
      ushr r2.xyzw, r1.xzyw, l(5, 5, 5, 5)
      and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff)
      iadd r1.xyzw, r0.xzyw, r2.xzyw
    else 
      ieq r0.x, CB0[0][3].z, l(15)
      if_nz r0.x
        and r0.xyzw, r1.xzyw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0)
        ishl r2.xyzw, r1.xzyw, l(8, 8, 8, 8)
        and r2.xyzw, r2.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00)
        iadd r0.xyzw, r0.xyzw, r2.xyzw
        ushr r2.xyzw, r1.xzyw, l(8, 8, 8, 8)
        and r2.xyzw, r2.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f)
        iadd r1.xyzw, r0.xzyw, r2.xzyw
      endif 
    endif 
  endif 
endif 
ishl r0.xy, vThreadID.xyxx, l(2, 1, 0, 0)
ishl r0.z, CB0[0][2].y, l(1)
ishl r0.x, r0.x, l(1)
imad r0.y, vThreadID.z, r0.z, r0.y
imad r0.x, r0.y, CB0[0][0].w, r0.x
iadd r0.x, r0.x, CB0[0][0].z
store_raw U0[0].xy, r0.x, r1.xyxx
iadd r0.x, r0.x, CB0[0][0].w
store_raw U0[0].xy, r0.x, r1.zwzz
ret 
// Approximately 142 instruction slots used
