//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//
// Buffer Definitions: 
//
// cbuffer xe_system_cbuffer
// {
//
//   uint xe_flags;                     // Offset:    0 Size:     4 [unused]
//   uint xe_vertex_index_endian_and_edge_factors;// Offset:    4 Size:     4 [unused]
//   int xe_vertex_base_index;          // Offset:    8 Size:     4 [unused]
//   uint xe_pixel_pos_reg;             // Offset:   12 Size:     4 [unused]
//   float3 xe_ndc_scale;               // Offset:   16 Size:    12 [unused]
//   float xe_pixel_half_pixel_offset;  // Offset:   28 Size:     4 [unused]
//   float3 xe_ndc_offset;              // Offset:   32 Size:    12 [unused]
//   int xe_alpha_test;                 // Offset:   44 Size:     4 [unused]
//   float2 xe_point_size;              // Offset:   48 Size:     8
//   float2 xe_point_size_min_max;      // Offset:   56 Size:     8
//   float2 xe_point_screen_to_ndc;     // Offset:   64 Size:     8
//   uint2 xe_sample_count_log2;        // Offset:   72 Size:     8 [unused]
//   float2 xe_alpha_test_range;        // Offset:   80 Size:     8 [unused]
//   uint xe_edram_pitch_tiles;         // Offset:   88 Size:     4 [unused]
//   uint xe_edram_depth_base_dwords;   // Offset:   92 Size:     4 [unused]
//   float4 xe_color_exp_bias;          // Offset:   96 Size:    16 [unused]
//   uint4 xe_color_output_map;         // Offset:  112 Size:    16 [unused]
//   float2 xe_tessellation_factor_range;// Offset:  128 Size:     8 [unused]
//   float2 xe_edram_depth_range;       // Offset:  136 Size:     8 [unused]
//   float2 xe_edram_poly_offset_front; // Offset:  144 Size:     8 [unused]
//   float2 xe_edram_poly_offset_back;  // Offset:  152 Size:     8 [unused]
//   uint xe_edram_resolution_scale_log2;// Offset:  160 Size:     4 [unused]
//   uint xe_edram_stencil_reference;   // Offset:  164 Size:     4 [unused]
//   uint xe_edram_stencil_read_mask;   // Offset:  168 Size:     4 [unused]
//   uint xe_edram_stencil_write_mask;  // Offset:  172 Size:     4 [unused]
//   uint4 xe_edram_stencil_front;      // Offset:  176 Size:    16 [unused]
//   uint4 xe_edram_stencil_back;       // Offset:  192 Size:    16 [unused]
//   uint4 xe_edram_base_dwords;        // Offset:  208 Size:    16 [unused]
//   uint4 xe_edram_rt_flags;           // Offset:  224 Size:    16 [unused]
//   uint4 xe_edram_rt_pack_width_low;  // Offset:  240 Size:    16 [unused]
//   uint4 xe_edram_rt_pack_offset_low; // Offset:  256 Size:    16 [unused]
//   uint4 xe_edram_rt_pack_width_high; // Offset:  272 Size:    16 [unused]
//   uint4 xe_edram_rt_pack_offset_high;// Offset:  288 Size:    16 [unused]
//   uint4 xe_edram_load_mask_rt01;     // Offset:  304 Size:    16 [unused]
//   uint4 xe_edram_load_mask_rt23;     // Offset:  320 Size:    16 [unused]
//   float4 xe_edram_load_scale_rt01;   // Offset:  336 Size:    16 [unused]
//   float4 xe_edram_load_scale_rt23;   // Offset:  352 Size:    16 [unused]
//   uint4 xe_edram_blend_rt01;         // Offset:  368 Size:    16 [unused]
//   uint4 xe_edram_blend_rt23;         // Offset:  384 Size:    16 [unused]
//   float4 xe_edram_blend_constant;    // Offset:  400 Size:    16 [unused]
//   float4 xe_edram_store_min_rt01;    // Offset:  416 Size:    16 [unused]
//   float4 xe_edram_store_min_rt23;    // Offset:  432 Size:    16 [unused]
//   float4 xe_edram_store_max_rt01;    // Offset:  448 Size:    16 [unused]
//   float4 xe_edram_store_max_rt23;    // Offset:  464 Size:    16 [unused]
//   float4 xe_edram_store_scale_rt01;  // Offset:  480 Size:    16 [unused]
//   float4 xe_edram_store_scale_rt23;  // Offset:  496 Size:    16 [unused]
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim      ID      HLSL Bind  Count
// ------------------------------ ---------- ------- ----------- ------- -------------- ------
// xe_system_cbuffer                 cbuffer      NA          NA     CB0            cb0      1 
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// TEXCOORD                 0   xyzw        0     NONE   float   xyzw
// TEXCOORD                 1   xyzw        1     NONE   float   xyzw
// TEXCOORD                 2   xyzw        2     NONE   float   xyzw
// TEXCOORD                 3   xyzw        3     NONE   float   xyzw
// TEXCOORD                 4   xyzw        4     NONE   float   xyzw
// TEXCOORD                 5   xyzw        5     NONE   float   xyzw
// TEXCOORD                 6   xyzw        6     NONE   float   xyzw
// TEXCOORD                 7   xyzw        7     NONE   float   xyzw
// TEXCOORD                 8   xyzw        8     NONE   float   xyzw
// TEXCOORD                 9   xyzw        9     NONE   float   xyzw
// TEXCOORD                10   xyzw       10     NONE   float   xyzw
// TEXCOORD                11   xyzw       11     NONE   float   xyzw
// TEXCOORD                12   xyzw       12     NONE   float   xyzw
// TEXCOORD                13   xyzw       13     NONE   float   xyzw
// TEXCOORD                14   xyzw       14     NONE   float   xyzw
// TEXCOORD                15   xyzw       15     NONE   float   xyzw
// TEXCOORD                16   xyz        16     NONE   float     z 
// TEXCOORD                17   xy         17     NONE   float   xy  
// SV_Position              0   xyzw       18      POS   float   xyzw
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// TEXCOORD                 0   xyzw        0     NONE   float   xyzw
// TEXCOORD                 1   xyzw        1     NONE   float   xyzw
// TEXCOORD                 2   xyzw        2     NONE   float   xyzw
// TEXCOORD                 3   xyzw        3     NONE   float   xyzw
// TEXCOORD                 4   xyzw        4     NONE   float   xyzw
// TEXCOORD                 5   xyzw        5     NONE   float   xyzw
// TEXCOORD                 6   xyzw        6     NONE   float   xyzw
// TEXCOORD                 7   xyzw        7     NONE   float   xyzw
// TEXCOORD                 8   xyzw        8     NONE   float   xyzw
// TEXCOORD                 9   xyzw        9     NONE   float   xyzw
// TEXCOORD                10   xyzw       10     NONE   float   xyzw
// TEXCOORD                11   xyzw       11     NONE   float   xyzw
// TEXCOORD                12   xyzw       12     NONE   float   xyzw
// TEXCOORD                13   xyzw       13     NONE   float   xyzw
// TEXCOORD                14   xyzw       14     NONE   float   xyzw
// TEXCOORD                15   xyzw       15     NONE   float   xyzw
// TEXCOORD                16   xyz        16     NONE   float   xyz 
// TEXCOORD                17   xy         17     NONE   float   xy  
// SV_Position              0   xyzw       18      POS   float   xyzw
//
gs_5_1
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[0:0][5], immediateIndexed, space=0
dcl_input v[1][0].xyzw
dcl_input v[1][1].xyzw
dcl_input v[1][2].xyzw
dcl_input v[1][3].xyzw
dcl_input v[1][4].xyzw
dcl_input v[1][5].xyzw
dcl_input v[1][6].xyzw
dcl_input v[1][7].xyzw
dcl_input v[1][8].xyzw
dcl_input v[1][9].xyzw
dcl_input v[1][10].xyzw
dcl_input v[1][11].xyzw
dcl_input v[1][12].xyzw
dcl_input v[1][13].xyzw
dcl_input v[1][14].xyzw
dcl_input v[1][15].xyzw
dcl_input v[1][16].xyz
dcl_input v[1][17].xy
dcl_input_siv v[1][18].xyzw, position
dcl_temps 2
dcl_inputprimitive point 
dcl_stream m0
dcl_outputtopology trianglestrip 
dcl_output o0.xyzw
dcl_output o1.xyzw
dcl_output o2.xyzw
dcl_output o3.xyzw
dcl_output o4.xyzw
dcl_output o5.xyzw
dcl_output o6.xyzw
dcl_output o7.xyzw
dcl_output o8.xyzw
dcl_output o9.xyzw
dcl_output o10.xyzw
dcl_output o11.xyzw
dcl_output o12.xyzw
dcl_output o13.xyzw
dcl_output o14.xyzw
dcl_output o15.xyzw
dcl_output o16.xyz
dcl_output o17.xy
dcl_output_siv o18.xyzw, position
dcl_maxout 4
lt r0.x, l(0.000000), v[0][16].z
movc r0.xy, r0.xxxx, v[0][16].zzzz, CB0[0][3].xyxx
max r0.xy, r0.xyxx, CB0[0][3].zzzz
min r0.xy, r0.xyxx, CB0[0][3].wwww
mul r0.xy, r0.xyxx, CB0[0][4].xyxx
mul r0.zw, r0.xxxy, v[0][18].wwww
mad r1.xyzw, r0.zwzw, l(-1.000000, 1.000000, 1.000000, -1.000000), v[0][18].xyxy
mov o0.xyzw, v[0][0].xyzw
mov o1.xyzw, v[0][1].xyzw
mov o2.xyzw, v[0][2].xyzw
mov o3.xyzw, v[0][3].xyzw
mov o4.xyzw, v[0][4].xyzw
mov o5.xyzw, v[0][5].xyzw
mov o6.xyzw, v[0][6].xyzw
mov o7.xyzw, v[0][7].xyzw
mov o8.xyzw, v[0][8].xyzw
mov o9.xyzw, v[0][9].xyzw
mov o10.xyzw, v[0][10].xyzw
mov o11.xyzw, v[0][11].xyzw
mov o12.xyzw, v[0][12].xyzw
mov o13.xyzw, v[0][13].xyzw
mov o14.xyzw, v[0][14].xyzw
mov o15.xyzw, v[0][15].xyzw
mov o16.xy, l(0,1.000000,0,0)
mov o16.z, v[0][16].z
mov o17.xy, v[0][17].xyxx
mov o18.xy, r1.xyxx
mov o18.zw, v[0][18].zzzw
emit_stream m0
mad r0.zw, r0.xxxy, v[0][18].wwww, v[0][18].xxxy
mov o0.xyzw, v[0][0].xyzw
mov o1.xyzw, v[0][1].xyzw
mov o2.xyzw, v[0][2].xyzw
mov o3.xyzw, v[0][3].xyzw
mov o4.xyzw, v[0][4].xyzw
mov o5.xyzw, v[0][5].xyzw
mov o6.xyzw, v[0][6].xyzw
mov o7.xyzw, v[0][7].xyzw
mov o8.xyzw, v[0][8].xyzw
mov o9.xyzw, v[0][9].xyzw
mov o10.xyzw, v[0][10].xyzw
mov o11.xyzw, v[0][11].xyzw
mov o12.xyzw, v[0][12].xyzw
mov o13.xyzw, v[0][13].xyzw
mov o14.xyzw, v[0][14].xyzw
mov o15.xyzw, v[0][15].xyzw
mov o16.xy, l(1.000000,1.000000,0,0)
mov o16.z, v[0][16].z
mov o17.xy, v[0][17].xyxx
mov o18.xy, r0.zwzz
mov o18.zw, v[0][18].zzzw
emit_stream m0
mad r0.xy, -r0.xyxx, v[0][18].wwww, v[0][18].xyxx
mov o0.xyzw, v[0][0].xyzw
mov o1.xyzw, v[0][1].xyzw
mov o2.xyzw, v[0][2].xyzw
mov o3.xyzw, v[0][3].xyzw
mov o4.xyzw, v[0][4].xyzw
mov o5.xyzw, v[0][5].xyzw
mov o6.xyzw, v[0][6].xyzw
mov o7.xyzw, v[0][7].xyzw
mov o8.xyzw, v[0][8].xyzw
mov o9.xyzw, v[0][9].xyzw
mov o10.xyzw, v[0][10].xyzw
mov o11.xyzw, v[0][11].xyzw
mov o12.xyzw, v[0][12].xyzw
mov o13.xyzw, v[0][13].xyzw
mov o14.xyzw, v[0][14].xyzw
mov o15.xyzw, v[0][15].xyzw
mov o16.xy, l(0,0,0,0)
mov o16.z, v[0][16].z
mov o17.xy, v[0][17].xyxx
mov o18.xy, r0.xyxx
mov o18.zw, v[0][18].zzzw
emit_stream m0
mov o0.xyzw, v[0][0].xyzw
mov o1.xyzw, v[0][1].xyzw
mov o2.xyzw, v[0][2].xyzw
mov o3.xyzw, v[0][3].xyzw
mov o4.xyzw, v[0][4].xyzw
mov o5.xyzw, v[0][5].xyzw
mov o6.xyzw, v[0][6].xyzw
mov o7.xyzw, v[0][7].xyzw
mov o8.xyzw, v[0][8].xyzw
mov o9.xyzw, v[0][9].xyzw
mov o10.xyzw, v[0][10].xyzw
mov o11.xyzw, v[0][11].xyzw
mov o12.xyzw, v[0][12].xyzw
mov o13.xyzw, v[0][13].xyzw
mov o14.xyzw, v[0][14].xyzw
mov o15.xyzw, v[0][15].xyzw
mov o16.xy, l(1.000000,0,0,0)
mov o16.z, v[0][16].z
mov o17.xy, v[0][17].xyxx
mov o18.xy, r1.zwzz
mov o18.zw, v[0][18].zzzw
emit_stream m0
cut_stream m0
ret 
// Approximately 99 instruction slots used
