//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//
//
// Patch Constant signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_TessFactor            0   x           0  TRIEDGE   float   x   
// SV_TessFactor            1   x           1  TRIEDGE   float   x   
// SV_TessFactor            2   x           2  TRIEDGE   float   x   
// SV_InsideTessFactor      0   x           3   TRIINT   float   x   
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// XETESSFACTOR             0   x           0     NONE   float   x   
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// XEVERTEXID               0   x           0     NONE   float   x   
//
// Tessellation Domain   # of control points
// -------------------- --------------------
// Triangle                                3
//
// Tessellation Output Primitive  Partitioning Type 
// ------------------------------ ------------------
// Clockwise Triangles            Even Fractional   
//
hs_5_1
hs_decls 
dcl_input_control_point_count 3
dcl_output_control_point_count 3
dcl_tessellator_domain domain_tri
dcl_tessellator_partitioning partitioning_fractional_even
dcl_tessellator_output_primitive output_triangle_cw
dcl_globalFlags refactoringAllowed
hs_control_point_phase 
dcl_output o0.x
mov o0.x, l(0)
ret 
hs_fork_phase 
dcl_hs_fork_phase_instance_count 3
dcl_input vForkInstanceID
dcl_input vicp[3][0].x
dcl_output_siv o0.x, finalTriUeq0EdgeTessFactor
dcl_output_siv o1.x, finalTriVeq0EdgeTessFactor
dcl_output_siv o2.x, finalTriWeq0EdgeTessFactor
dcl_temps 1
dcl_indexrange o0.x 3
iadd r0.x, vForkInstanceID.x, l(1)
udiv null, r0.x, r0.x, l(3)
mov r0.y, vForkInstanceID.x
mov o[r0.y + 0].x, vicp[r0.x + 0][0].x
ret 
hs_fork_phase 
dcl_input vicp[3][0].x
dcl_output_siv o3.x, finalTriInsideTessFactor
dcl_temps 1
min r0.x, vicp[2][0].x, vicp[1][0].x
min o3.x, r0.x, vicp[0][0].x
ret 
// Approximately 10 instruction slots used
