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Fixing sub carry flag.

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This commit is contained in:
Ben Vanik
2015-05-13 18:04:33 -07:00
parent b819c992ed
commit 00b79d66ff
103 changed files with 2491 additions and 754 deletions
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160
src/xenia/cpu/frontend/test/bin/instr_subfme.dis
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@@ -8,54 +8,124 @@ Disassembly of section .text:
100010: 7c 80 01 14 adde r4,r0,r0
100014: 4e 80 00 20 blr
0000000000100018 <test_subfme_one_ca_2>:
100018: 7c 63 1a 78 xor r3,r3,r3
10001c: 7c 63 18 f8 not r3,r3
100020: 30 63 00 01 addic r3,r3,1
100024: 7c 6a 01 d0 subfme r3,r10
100028: 7c 80 01 14 adde r4,r0,r0
10002c: 4e 80 00 20 blr
0000000000100018 <test_subfme_one_ca_1_constant>:
100018: 3d 40 00 01 lis r10,1
10001c: 61 4a 03 bf ori r10,r10,959
100020: 7c 63 1a 78 xor r3,r3,r3
100024: 7c 63 18 f8 not r3,r3
100028: 30 63 00 01 addic r3,r3,1
10002c: 7c 6a 01 d0 subfme r3,r10
100030: 7c 80 01 14 adde r4,r0,r0
100034: 4e 80 00 20 blr
0000000000100030 <test_subfme_one_ca_3>:
100030: 7c 63 1a 78 xor r3,r3,r3
100034: 7c 63 18 f8 not r3,r3
100038: 30 63 00 01 addic r3,r3,1
10003c: 7c 6a 01 d0 subfme r3,r10
100040: 7c 80 01 14 adde r4,r0,r0
100044: 4e 80 00 20 blr
0000000000100038 <test_subfme_one_ca_2>:
100038: 7c 63 1a 78 xor r3,r3,r3
10003c: 7c 63 18 f8 not r3,r3
100040: 30 63 00 01 addic r3,r3,1
100044: 7c 6a 01 d0 subfme r3,r10
100048: 7c 80 01 14 adde r4,r0,r0
10004c: 4e 80 00 20 blr
0000000000100048 <test_subfme_one_ca_4>:
100048: 7c 63 1a 78 xor r3,r3,r3
10004c: 7c 63 18 f8 not r3,r3
100050: 30 63 00 01 addic r3,r3,1
100054: 7c 6a 01 d0 subfme r3,r10
100058: 7c 80 01 14 adde r4,r0,r0
10005c: 4e 80 00 20 blr
0000000000100050 <test_subfme_one_ca_2_constant>:
100050: 39 40 00 00 li r10,0
100054: 7c 63 1a 78 xor r3,r3,r3
100058: 7c 63 18 f8 not r3,r3
10005c: 30 63 00 01 addic r3,r3,1
100060: 7c 6a 01 d0 subfme r3,r10
100064: 7c 80 01 14 adde r4,r0,r0
100068: 4e 80 00 20 blr
0000000000100060 <test_subfme_zero_ca_1>:
100060: 7c 63 1a 78 xor r3,r3,r3
100064: 30 63 00 01 addic r3,r3,1
100068: 7c 6a 01 d0 subfme r3,r10
10006c: 7c 80 01 14 adde r4,r0,r0
100070: 4e 80 00 20 blr
000000000010006c <test_subfme_one_ca_3>:
10006c: 7c 63 1a 78 xor r3,r3,r3
100070: 7c 63 18 f8 not r3,r3
100074: 30 63 00 01 addic r3,r3,1
100078: 7c 6a 01 d0 subfme r3,r10
10007c: 7c 80 01 14 adde r4,r0,r0
100080: 4e 80 00 20 blr
0000000000100074 <test_subfme_zero_ca_2>:
100074: 7c 63 1a 78 xor r3,r3,r3
100078: 30 63 00 01 addic r3,r3,1
10007c: 7c 6a 01 d0 subfme r3,r10
100080: 7c 80 01 14 adde r4,r0,r0
100084: 4e 80 00 20 blr
0000000000100088 <test_subfme_zero_ca_3>:
0000000000100084 <test_subfme_one_ca_3_constant>:
100084: 39 40 00 01 li r10,1
100088: 7c 63 1a 78 xor r3,r3,r3
10008c: 30 63 00 01 addic r3,r3,1
100090: 7c 6a 01 d0 subfme r3,r10
100094: 7c 80 01 14 adde r4,r0,r0
100098: 4e 80 00 20 blr
10008c: 7c 63 18 f8 not r3,r3
100090: 30 63 00 01 addic r3,r3,1
100094: 7c 6a 01 d0 subfme r3,r10
100098: 7c 80 01 14 adde r4,r0,r0
10009c: 4e 80 00 20 blr
000000000010009c <test_subfme_zero_ca_4>:
10009c: 7c 63 1a 78 xor r3,r3,r3
1000a0: 30 63 00 01 addic r3,r3,1
1000a4: 7c 6a 01 d0 subfme r3,r10
1000a8: 7c 80 01 14 adde r4,r0,r0
1000ac: 4e 80 00 20 blr
00000000001000a0 <test_subfme_one_ca_4>:
1000a0: 7c 63 1a 78 xor r3,r3,r3
1000a4: 7c 63 18 f8 not r3,r3
1000a8: 30 63 00 01 addic r3,r3,1
1000ac: 7c 6a 01 d0 subfme r3,r10
1000b0: 7c 80 01 14 adde r4,r0,r0
1000b4: 4e 80 00 20 blr
00000000001000b8 <test_subfme_one_ca_4_constant>:
1000b8: 39 40 ff ff li r10,-1
1000bc: 7c 63 1a 78 xor r3,r3,r3
1000c0: 7c 63 18 f8 not r3,r3
1000c4: 30 63 00 01 addic r3,r3,1
1000c8: 7c 6a 01 d0 subfme r3,r10
1000cc: 7c 80 01 14 adde r4,r0,r0
1000d0: 4e 80 00 20 blr
00000000001000d4 <test_subfme_zero_ca_1>:
1000d4: 7c 63 1a 78 xor r3,r3,r3
1000d8: 30 63 00 01 addic r3,r3,1
1000dc: 7c 6a 01 d0 subfme r3,r10
1000e0: 7c 80 01 14 adde r4,r0,r0
1000e4: 4e 80 00 20 blr
00000000001000e8 <test_subfme_zero_ca_1_constant>:
1000e8: 3d 40 00 01 lis r10,1
1000ec: 61 4a 03 bf ori r10,r10,959
1000f0: 7c 63 1a 78 xor r3,r3,r3
1000f4: 30 63 00 01 addic r3,r3,1
1000f8: 7c 6a 01 d0 subfme r3,r10
1000fc: 7c 80 01 14 adde r4,r0,r0
100100: 4e 80 00 20 blr
0000000000100104 <test_subfme_zero_ca_2>:
100104: 7c 63 1a 78 xor r3,r3,r3
100108: 30 63 00 01 addic r3,r3,1
10010c: 7c 6a 01 d0 subfme r3,r10
100110: 7c 80 01 14 adde r4,r0,r0
100114: 4e 80 00 20 blr
0000000000100118 <test_subfme_zero_ca_2_constant>:
100118: 39 40 00 00 li r10,0
10011c: 7c 63 1a 78 xor r3,r3,r3
100120: 30 63 00 01 addic r3,r3,1
100124: 7c 6a 01 d0 subfme r3,r10
100128: 7c 80 01 14 adde r4,r0,r0
10012c: 4e 80 00 20 blr
0000000000100130 <test_subfme_zero_ca_3>:
100130: 7c 63 1a 78 xor r3,r3,r3
100134: 30 63 00 01 addic r3,r3,1
100138: 7c 6a 01 d0 subfme r3,r10
10013c: 7c 80 01 14 adde r4,r0,r0
100140: 4e 80 00 20 blr
0000000000100144 <test_subfme_zero_ca_3_constant>:
100144: 39 40 00 01 li r10,1
100148: 7c 63 1a 78 xor r3,r3,r3
10014c: 30 63 00 01 addic r3,r3,1
100150: 7c 6a 01 d0 subfme r3,r10
100154: 7c 80 01 14 adde r4,r0,r0
100158: 4e 80 00 20 blr
000000000010015c <test_subfme_zero_ca_4>:
10015c: 7c 63 1a 78 xor r3,r3,r3
100160: 30 63 00 01 addic r3,r3,1
100164: 7c 6a 01 d0 subfme r3,r10
100168: 7c 80 01 14 adde r4,r0,r0
10016c: 4e 80 00 20 blr
0000000000100170 <test_subfme_zero_ca_4_constant>:
100170: 39 40 ff ff li r10,-1
100174: 7c 63 1a 78 xor r3,r3,r3
100178: 30 63 00 01 addic r3,r3,1
10017c: 7c 6a 01 d0 subfme r3,r10
100180: 7c 80 01 14 adde r4,r0,r0
100184: 4e 80 00 20 blr