mul tests + fix.

src/alloy/frontend/ppc/test/instr_mulhwu.s

@@ -0,0 +1,53 @@
+test_mulhwu_1:
+  #_ REGISTER_IN r4 1
+  #_ REGISTER_IN r5 0
+  mulhwu r3, r4, r5
+  blr
+  #_ REGISTER_OUT r3 0
+  #_ REGISTER_OUT r4 1
+  #_ REGISTER_OUT r5 0
+
+test_mulhwu_2:
+  #_ REGISTER_IN r4 0x00000000FFFFFFFF
+  #_ REGISTER_IN r5 1
+  mulhwu r3, r4, r5
+  blr
+  #_ REGISTER_OUT r3 0
+  #_ REGISTER_OUT r4 0x00000000FFFFFFFF
+  #_ REGISTER_OUT r5 1
+
+test_mulhwu_3:
+  #_ REGISTER_IN r4 0x00000001FFFFFFFF
+  #_ REGISTER_IN r5 1
+  mulhwu r3, r4, r5
+  blr
+  #_ REGISTER_OUT r3 0
+  #_ REGISTER_OUT r4 0x00000001FFFFFFFF
+  #_ REGISTER_OUT r5 1
+
+test_mulhwu_4:
+  #_ REGISTER_IN r4 0x800000007FFFFFFF
+  #_ REGISTER_IN r5 1
+  mulhwu r3, r4, r5
+  blr
+  #_ REGISTER_OUT r3 0
+  #_ REGISTER_OUT r4 0x800000007FFFFFFF
+  #_ REGISTER_OUT r5 1
+
+test_mulhwu_5:
+  #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_IN r5 1
+  mulhwu r3, r4, r5
+  blr
+  #_ REGISTER_OUT r3 0
+  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_OUT r5 1
+
+test_mulhwu_6:
+  #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_IN r5 0xFFFFFFFFFFFFFFFF
+  mulhwu r3, r4, r5
+  blr
+  #_ REGISTER_OUT r3 0x00000000FFFFFFFE
+  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF