Pure dynamic MMIO access. Prep for more complex GPU memory management.
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@@ -10,7 +10,6 @@
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#ifndef XENIA_CPU_PROCESSOR_H_
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#define XENIA_CPU_PROCESSOR_H_
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#include <alloy/runtime/register_access.h>
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#include <xenia/core.h>
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#include <xenia/debug/debug_target.h>
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@@ -28,11 +27,6 @@ XEDECLARECLASS2(xe, cpu, XexModule);
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namespace xe {
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namespace cpu {
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using RegisterAccessCallbacks = alloy::runtime::RegisterAccessCallbacks;
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using RegisterHandlesCallback = alloy::runtime::RegisterHandlesCallback;
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using RegisterReadCallback = alloy::runtime::RegisterReadCallback;
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using RegisterWriteCallback = alloy::runtime::RegisterWriteCallback;
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class Processor : public debug::DebugTarget {
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public:
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@@ -45,8 +39,6 @@ public:
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int Setup();
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void AddRegisterAccessCallbacks(RegisterAccessCallbacks callbacks);
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int Execute(
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XenonThreadState* thread_state, uint64_t address);
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uint64_t Execute(
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