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[D3D12] Various refactoring mostly on the immediate drawer side, cache immdraw scissor, force stretch alpha to 1

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This commit is contained in:
Triang3l
2020-09-20 15:15:08 +03:00
parent 6ba0620b10
commit 183c7eee2b
21 changed files with 145 additions and 117 deletions
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20
src/xenia/gpu/d3d12/d3d12_command_processor.h
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@@ -376,7 +376,7 @@ class D3D12CommandProcessor : public CommandProcessor {
CommandAllocator* command_allocator_submitted_last_ = nullptr;
ID3D12GraphicsCommandList* command_list_ = nullptr;
ID3D12GraphicsCommandList1* command_list_1_ = nullptr;
std::unique_ptr<DeferredCommandList> deferred_command_list_ = nullptr;
std::unique_ptr<DeferredCommandList> deferred_command_list_;
// Should bindless textures and samplers be used - many times faster
// UpdateBindings than bindful (that becomes a significant bottleneck with
@@ -388,14 +388,12 @@ class D3D12CommandProcessor : public CommandProcessor {
// targets.
bool edram_rov_used_ = false;
std::unique_ptr<ui::d3d12::D3D12UploadBufferPool> constant_buffer_pool_ =
nullptr;
std::unique_ptr<ui::d3d12::D3D12UploadBufferPool> constant_buffer_pool_;
static constexpr uint32_t kViewBindfulHeapSize = 32768;
static_assert(kViewBindfulHeapSize <=
D3D12_MAX_SHADER_VISIBLE_DESCRIPTOR_HEAP_SIZE_TIER_1);
std::unique_ptr<ui::d3d12::D3D12DescriptorHeapPool> view_bindful_heap_pool_ =
nullptr;
std::unique_ptr<ui::d3d12::D3D12DescriptorHeapPool> view_bindful_heap_pool_;
// Currently bound descriptor heap - updated by RequestViewBindfulDescriptors.
ID3D12DescriptorHeap* view_bindful_heap_current_;
// Rationale: textures have 4 KB alignment in guest memory, and there can be
@@ -426,7 +424,7 @@ class D3D12CommandProcessor : public CommandProcessor {
static constexpr uint32_t kSamplerHeapSize = 2000;
static_assert(kSamplerHeapSize <= D3D12_MAX_SHADER_VISIBLE_SAMPLER_HEAP_SIZE);
std::unique_ptr<ui::d3d12::D3D12DescriptorHeapPool>
sampler_bindful_heap_pool_ = nullptr;
sampler_bindful_heap_pool_;
ID3D12DescriptorHeap* sampler_bindful_heap_current_;
ID3D12DescriptorHeap* sampler_bindless_heap_current_ = nullptr;
D3D12_CPU_DESCRIPTOR_HANDLE sampler_bindless_heap_cpu_start_;
@@ -452,15 +450,15 @@ class D3D12CommandProcessor : public CommandProcessor {
ID3D12RootSignature* root_signature_bindless_vs_ = nullptr;
ID3D12RootSignature* root_signature_bindless_ds_ = nullptr;
std::unique_ptr<SharedMemory> shared_memory_ = nullptr;
std::unique_ptr<SharedMemory> shared_memory_;
std::unique_ptr<PipelineCache> pipeline_cache_ = nullptr;
std::unique_ptr<PipelineCache> pipeline_cache_;
std::unique_ptr<TextureCache> texture_cache_ = nullptr;
std::unique_ptr<TextureCache> texture_cache_;
std::unique_ptr<RenderTargetCache> render_target_cache_ = nullptr;
std::unique_ptr<RenderTargetCache> render_target_cache_;
std::unique_ptr<PrimitiveConverter> primitive_converter_ = nullptr;
std::unique_ptr<PrimitiveConverter> primitive_converter_;
// Mip 0 contains the normal gamma ramp (256 entries), mip 1 contains the PWL
// ramp (128 entries). DXGI_FORMAT_R10G10B10A2_UNORM 1D.