use Sleep(0) instead of SwitchToThread, should waste less power and help the os with scheduling.
PM4 buffer handling made a virtual member of commandprocessor, place the implementation/declaration into reusable macro files. this is probably the biggest boost here. Optimized SET_CONSTANT/ LOAD_CONSTANT pm4 ops based on the register range they start writing at, this was also a nice boost Expose X64 extension flags to code outside of x64 backend, so we can detect and use things like avx512, xop, avx2, etc in normal code Add freelists for HIR structures to try to reduce the number of last level cache misses during optimization (currently disabled... fixme later) Analyzed PGO feedback and reordered branches, uninlined functions, moved code out into different functions based on info from it in the PM4 functions, this gave like a 2% boost at best. Added support for the db16cyc opcode, which is used often in xb360 spinlocks. before it was just being translated to nop, now on x64 we translate it to _mm_pause but may change that in the future to reduce cpu time wasted texture util - all our divisors were powers of 2, instead we look up a shift. this made texture scaling slightly faster, more so on intel processors which seem to be worse at int divs. GetGuestTextureLayout is now a little faster, although it is still one of the heaviest functions in the emulator when scaling is on. xe_unlikely_mutex was not a good choice for the guest clock lock, (running theory) on intel processors another thread may take a significant time to update the clock? maybe because of the uint64 division? really not sure, but switched it to xe_mutex. This fixed audio stutter that i had introduced to 1 or 2 games, fixed performance on that n64 rare game with the monkeys. Took another crack at DMA implementation, another failure. Instead of passing as a parameter, keep the ringbuffer reader as the first member of commandprocessor so it can be accessed through this Added macro for noalias Applied noalias to Memory::LookupHeap. This reduced the size of the executable by 7 kb. Reworked kernel shim template, this shaved like 100kb off the exe and eliminated the indirect calls from the shim to the actual implementation. We still unconditionally generate string representations of kernel calls though :(, unless it is kHighFrequency Add nvapi extensions support, currently unused. Will use CPUVISIBLE memory at some point Inserted prefetches in a few places based on feedback from vtune. Add native implementation of SHA int8 if all elements are the same Vectorized comparisons for SetViewport, SetScissorRect Vectorized ranged comparisons for WriteRegister Add XE_MSVC_ASSUME Move FormatInfo::name out of the structure, instead look up the name in a different table. Debug related data and critical runtime data are best kept apart Templated UpdateSystemConstantValues based on ROV/RTV and primitive_polygonal Add ArchFloatMask functions, these are for storing the results of floating point comparisons without doing costly float->int pipeline transfers (vucomiss/setb) Use floatmasks in UpdateSystemConstantValues for checking if dirty, only transfer to int at end of function. Instead of dirty |= (x == y) in UpdateSystemConstantValues, now we do dirty_u32 |= (x^y). if any of them are not equal, dirty_u32 will be nz, else if theyre all equal it will be zero. This is more friendly to register renaming and the lack of dependencies on EFLAGS lets the compiler reorder better Add PrefetchSamplerParameters to D3D12TextureCache use PrefetchSamplerParameters in UpdateBindings to eliminate cache misses that vtune detected Add PrefetchTextureBinding to D3D12TextureCache Prefetch texture bindings to get rid of more misses vtune detected (more accesses out of order with random strides) Rewrote DMAC, still terrible though and have disabled it for now. Replace tiny memcmp of 6 U64 in render_target_cache with inline loop, msvc fails to make it a loop and instead does a thunk to their memcmp function, which is optimized for larger sizes PrefetchTextureBinding in AreActiveTextureSRVKeysUpToDate Replace memcmp calls for pipelinedescription with handwritten cmp Directly write some registers that dont have special handling in PM4 functions Changed EstimateMaxY to try to eliminate mispredictions that vtune was reporting, msvc ended up turning the changed code into a series of blends in ExecutePacketType3_EVENT_WRITE_EXT, instead of writing extents to an array on the stack and then doing xe_copy_and_swap_16 of the data to its dest, pre-swap each constant and then store those. msvc manages to unroll that into wider stores stop logging XE_SWAP every time we receive XE_SWAP, stop logging the start and end of each viz query Prefetch watch nodes in FireWatches based on feedback from vtune Removed dead code from texture_info.cc NOINLINE on GpuSwap, PGO builds did it so we should too.
This commit is contained in:
chss95cs@gmail.com
@@ -26,24 +26,6 @@
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#include "xenia/cpu/processor.h"
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#include "xenia/cpu/stack_walker.h"
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#include "xenia/cpu/xex_module.h"
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DEFINE_int32(x64_extension_mask, -1,
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"Allow the detection and utilization of specific instruction set "
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"features.\n"
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" 0 = x86_64 + AVX1\n"
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" 1 = AVX2\n"
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" 2 = FMA\n"
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" 4 = LZCNT\n"
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" 8 = BMI1\n"
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" 16 = BMI2\n"
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" 32 = F16C\n"
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" 64 = Movbe\n"
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" 128 = GFNI\n"
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" 256 = AVX512F\n"
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" 512 = AVX512VL\n"
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" 1024 = AVX512BW\n"
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" 2048 = AVX512DQ\n"
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" -1 = Detect and utilize all possible processor features\n",
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"x64");
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DEFINE_bool(record_mmio_access_exceptions, true,
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"For guest addresses records whether we caught any mmio accesses "
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@@ -103,7 +103,9 @@ X64Emitter::X64Emitter(X64Backend* backend, XbyakAllocator* allocator)
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"FAQ for system requirements at https://xenia.jp");
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return;
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}
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#if 1
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feature_flags_ = amd64::GetFeatureFlags();
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#else
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#define TEST_EMIT_FEATURE(emit, ext) \
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if ((cvars::x64_extension_mask & emit) == emit) { \
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feature_flags_ |= (cpu_.has(ext) ? emit : 0); \
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@@ -168,6 +170,7 @@ X64Emitter::X64Emitter(X64Backend* backend, XbyakAllocator* allocator)
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feature_flags_ |= kX64FlagsIndependentVars;
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}
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}
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#endif
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may_use_membase32_as_zero_reg_ =
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static_cast<uint32_t>(reinterpret_cast<uintptr_t>(
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processor()->memory()->virtual_membase())) == 0;
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@@ -913,6 +916,8 @@ static inline vec128_t v128_setr_bytes(unsigned char v0, unsigned char v1,
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static const vec128_t xmm_consts[] = {
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/* XMMZero */ vec128f(0.0f),
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/* XMMByteSwapMask */
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vec128i(0x00010203u, 0x04050607u, 0x08090A0Bu, 0x0C0D0E0Fu),
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/* XMMOne */ vec128f(1.0f),
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/* XMMOnePD */ vec128d(1.0),
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/* XMMNegativeOne */ vec128f(-1.0f, -1.0f, -1.0f, -1.0f),
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@@ -937,8 +942,7 @@ static const vec128_t xmm_consts[] = {
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vec128i(0x7FFFFFFFu, 0x7FFFFFFFu, 0x7FFFFFFFu, 0x7FFFFFFFu),
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/* XMMAbsMaskPD */
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vec128i(0xFFFFFFFFu, 0x7FFFFFFFu, 0xFFFFFFFFu, 0x7FFFFFFFu),
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/* XMMByteSwapMask */
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vec128i(0x00010203u, 0x04050607u, 0x08090A0Bu, 0x0C0D0E0Fu),
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/* XMMByteOrderMask */
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vec128i(0x01000302u, 0x05040706u, 0x09080B0Au, 0x0D0C0F0Eu),
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/* XMMPermuteControl15 */ vec128b(15),
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@@ -34,7 +34,7 @@ namespace xe {
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namespace cpu {
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namespace backend {
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namespace x64 {
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using namespace amd64;
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class X64Backend;
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class X64CodeCache;
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@@ -81,6 +81,7 @@ static SimdDomain PickDomain2(SimdDomain dom1, SimdDomain dom2) {
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}
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enum XmmConst {
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XMMZero = 0,
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XMMByteSwapMask,
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XMMOne,
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XMMOnePD,
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XMMNegativeOne,
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@@ -97,7 +98,7 @@ enum XmmConst {
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XMMSignMaskPD,
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XMMAbsMaskPS,
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XMMAbsMaskPD,
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XMMByteSwapMask,
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XMMByteOrderMask,
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XMMPermuteControl15,
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XMMPermuteByteMask,
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@@ -189,42 +190,6 @@ class XbyakAllocator : public Xbyak::Allocator {
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virtual bool useProtect() const { return false; }
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};
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enum X64EmitterFeatureFlags {
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kX64EmitAVX2 = 1 << 0,
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kX64EmitFMA = 1 << 1,
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kX64EmitLZCNT = 1 << 2, // this is actually ABM and includes popcount
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kX64EmitBMI1 = 1 << 3,
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kX64EmitBMI2 = 1 << 4,
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kX64EmitPrefetchW = 1 << 5,
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kX64EmitMovbe = 1 << 6,
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kX64EmitGFNI = 1 << 7,
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kX64EmitAVX512F = 1 << 8,
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kX64EmitAVX512VL = 1 << 9,
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kX64EmitAVX512BW = 1 << 10,
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kX64EmitAVX512DQ = 1 << 11,
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kX64EmitAVX512Ortho = kX64EmitAVX512F | kX64EmitAVX512VL,
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kX64EmitAVX512Ortho64 = kX64EmitAVX512Ortho | kX64EmitAVX512DQ,
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kX64FastJrcx = 1 << 12, // jrcxz is as fast as any other jump ( >= Zen1)
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kX64FastLoop =
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1 << 13, // loop/loope/loopne is as fast as any other jump ( >= Zen2)
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kX64EmitAVX512VBMI = 1 << 14,
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kX64FlagsIndependentVars =
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1 << 15, // if true, instructions that only modify some flags (like
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// inc/dec) do not introduce false dependencies on EFLAGS
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// because the individual flags are treated as different vars by
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// the processor. (this applies to zen)
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kX64EmitXOP = 1 << 16, // chrispy: xop maps really well to many vmx
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// instructions, and FX users need the boost
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kX64EmitFMA4 = 1 << 17, // todo: also use on zen1?
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kX64EmitTBM = 1 << 18,
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// kX64XMMRegisterMergeOptimization = 1 << 19, //section 2.11.5, amd family
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// 17h/19h optimization manuals. allows us to save 1 byte on certain xmm
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// instructions by using the legacy sse version if we recently cleared the
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// high 128 bits of the
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};
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class ResolvableGuestCall {
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public:
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bool is_jump_;
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@@ -1354,15 +1354,17 @@ struct VECTOR_SHA_V128
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static void EmitInt8(X64Emitter& e, const EmitArgType& i) {
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// TODO(benvanik): native version (with shift magic).
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if (i.src2.is_constant) {
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if (e.IsFeatureEnabled(kX64EmitGFNI)) {
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const auto& shamt = i.src2.constant();
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bool all_same = true;
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for (size_t n = 0; n < 16 - n; ++n) {
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if (shamt.u8[n] != shamt.u8[n + 1]) {
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all_same = false;
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break;
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}
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const auto& shamt = i.src2.constant();
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bool all_same = true;
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for (size_t n = 0; n < 16 - n; ++n) {
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if (shamt.u8[n] != shamt.u8[n + 1]) {
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all_same = false;
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break;
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}
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}
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if (e.IsFeatureEnabled(kX64EmitGFNI)) {
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if (all_same) {
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// Every count is the same, so we can use gf2p8affineqb.
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const uint8_t shift_amount = shamt.u8[0] & 0b111;
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@@ -1375,6 +1377,19 @@ struct VECTOR_SHA_V128
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return;
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}
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}
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else if (all_same) {
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Xmm to_be_shifted = GetInputRegOrConstant(e, i.src1, e.xmm1);
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e.vpmovsxbw(e.xmm0, to_be_shifted); //_mm_srai_epi16 / psraw
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e.vpunpckhqdq(e.xmm2, to_be_shifted, to_be_shifted);
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e.vpmovsxbw(e.xmm1, e.xmm2);
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e.vpsraw(e.xmm0, shamt.u8[0]);
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e.vpsraw(e.xmm1, shamt.u8[0]);
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e.vpacksswb(i.dest, e.xmm0, e.xmm1);
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return;
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}
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e.lea(e.GetNativeParam(1), e.StashConstantXmm(1, i.src2.constant()));
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} else {
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e.lea(e.GetNativeParam(1), e.StashXmm(1, i.src2));
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@@ -3234,7 +3234,17 @@ struct SET_ROUNDING_MODE_I32
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}
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};
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EMITTER_OPCODE_TABLE(OPCODE_SET_ROUNDING_MODE, SET_ROUNDING_MODE_I32);
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// ============================================================================
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// OPCODE_DELAY_EXECUTION
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// ============================================================================
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struct DELAY_EXECUTION
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: Sequence<DELAY_EXECUTION, I<OPCODE_DELAY_EXECUTION, VoidOp>> {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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// todo: what if they dont have smt?
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e.pause();
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}
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};
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EMITTER_OPCODE_TABLE(OPCODE_DELAY_EXECUTION, DELAY_EXECUTION);
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// Include anchors to other sequence sources so they get included in the build.
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extern volatile int anchor_control;
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static int anchor_control_dest = anchor_control;
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