[D3D12] Fake per-edge tessellation with continuous

src/xenia/gpu/d3d12/shaders/dxbc/tessellation_quad_vs.txt

@@ -0,0 +1,31 @@
+//
+// Generated by Microsoft (R) HLSL Shader Compiler 10.1
+//
+//
+//
+// Input signature:
+//
+// Name                 Index   Mask Register SysValue  Format   Used
+// -------------------- ----- ------ -------- -------- ------- ------
+// SV_VertexID              0   x           0   VERTID    uint   x   
+//
+//
+// Output signature:
+//
+// Name                 Index   Mask Register SysValue  Format   Used
+// -------------------- ----- ------ -------- -------- ------- ------
+// SV_Position              0   xyzw        0      POS   float   xyzw
+//
+vs_5_1
+dcl_globalFlags refactoringAllowed
+dcl_input_sgv v0.x, vertex_id
+dcl_output_siv o0.xyzw, position
+dcl_temps 1
+ushr r0.x, v0.x, l(1)
+mov r0.y, v0.x
+and r0.xy, r0.xyxx, l(1, 1, 0, 0)
+xor r0.y, r0.x, r0.y
+utof o0.xy, r0.xyxx
+mov o0.zw, l(0,0,0,1.000000)
+ret 
+// Approximately 7 instruction slots used