[GPU] XXH3 hash instead of XXH64
This commit is contained in:
@@ -17,7 +17,7 @@ namespace hash {
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// For use in unordered_sets and unordered_maps (primarily multisets and
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// multimaps, with manual collision resolution), where the hash is calculated
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// externally (for instance, as XXH64), possibly requiring context data rather
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// externally (for instance, as XXH3), possibly requiring context data rather
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// than a pure function to calculate the hash
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template <typename Key>
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struct IdentityHasher {
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21
src/xenia/base/xxhash.h
Normal file
21
src/xenia/base/xxhash.h
Normal file
@@ -0,0 +1,21 @@
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2020 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_BASE_XXHASH_H_
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#define XENIA_BASE_XXHASH_H_
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#define XXH_INLINE_ALL
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// Can't use XXH_X86DISPATCH because XXH is calculated on multiple threads,
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// while the dispatch writes the result (multiple pointers without any
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// synchronization) to XXH_g_dispatch at the first call.
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#include "third_party/xxhash/xxhash.h"
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#endif // XENIA_BASE_XXHASH_H_
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@@ -7,8 +7,6 @@
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******************************************************************************
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*/
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#include "third_party/xxhash/xxhash.h"
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#include <algorithm>
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#include <cstring>
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#include <utility>
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@@ -20,7 +20,6 @@
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#include <utility>
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#include "third_party/fmt/include/fmt/format.h"
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#include "third_party/xxhash/xxhash.h"
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#include "xenia/base/assert.h"
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#include "xenia/base/byte_order.h"
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#include "xenia/base/clock.h"
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@@ -30,6 +29,7 @@
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#include "xenia/base/math.h"
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#include "xenia/base/profiling.h"
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#include "xenia/base/string.h"
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#include "xenia/base/xxhash.h"
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#include "xenia/gpu/d3d12/d3d12_command_processor.h"
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#include "xenia/gpu/gpu_flags.h"
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#include "xenia/ui/d3d12/d3d12_util.h"
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@@ -325,9 +325,9 @@ void PipelineCache::InitializeShaderStorage(
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pipeline_stored_descriptions[i];
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// Validate file integrity, stop and truncate the stream if data is
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// corrupted.
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if (XXH64(&pipeline_stored_description.description,
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sizeof(pipeline_stored_description.description),
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0) != pipeline_stored_description.description_hash) {
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if (XXH3_64bits(&pipeline_stored_description.description,
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sizeof(pipeline_stored_description.description)) !=
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pipeline_stored_description.description_hash) {
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pipeline_stored_descriptions.resize(i);
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break;
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}
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@@ -471,7 +471,7 @@ void PipelineCache::InitializeShaderStorage(
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break;
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}
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uint64_t ucode_data_hash =
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XXH64(ucode_dwords.data(), ucode_byte_count, 0);
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XXH3_64bits(ucode_dwords.data(), ucode_byte_count);
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if (shader_header.ucode_data_hash != ucode_data_hash) {
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// Validation failed.
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break;
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@@ -828,7 +828,7 @@ D3D12Shader* PipelineCache::LoadShader(xenos::ShaderType shader_type,
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uint32_t dword_count) {
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// Hash the input memory and lookup the shader.
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return LoadShader(shader_type, host_address, dword_count,
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XXH64(host_address, dword_count * sizeof(uint32_t), 0));
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XXH3_64bits(host_address, dword_count * sizeof(uint32_t)));
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}
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D3D12Shader* PipelineCache::LoadShader(xenos::ShaderType shader_type,
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@@ -1065,7 +1065,7 @@ bool PipelineCache::ConfigurePipeline(
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}
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// Find an existing pipeline in the cache.
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uint64_t hash = XXH64(&description, sizeof(description), 0);
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uint64_t hash = XXH3_64bits(&description, sizeof(description));
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auto found_range = pipelines_.equal_range(hash);
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for (auto it = found_range.first; it != found_range.second; ++it) {
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Pipeline* found_pipeline = it->second;
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@@ -1185,20 +1185,20 @@ bool PipelineCache::TranslateShader(DxbcShaderTranslator& translator,
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uint64_t texture_binding_layout_hash = 0;
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if (texture_binding_count) {
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texture_binding_layout_hash =
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XXH64(texture_bindings, texture_binding_layout_bytes, 0);
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XXH3_64bits(texture_bindings, texture_binding_layout_bytes);
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}
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uint32_t bindless_sampler_count =
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bindless_resources_used_ ? sampler_binding_count : 0;
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uint64_t bindless_sampler_layout_hash = 0;
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if (bindless_sampler_count) {
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XXH64_state_t hash_state;
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XXH64_reset(&hash_state, 0);
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XXH3_state_t hash_state;
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XXH3_64bits_reset(&hash_state);
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for (uint32_t i = 0; i < bindless_sampler_count; ++i) {
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XXH64_update(&hash_state,
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&sampler_bindings[i].bindless_descriptor_index,
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sizeof(sampler_bindings[i].bindless_descriptor_index));
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XXH3_64bits_update(
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&hash_state, &sampler_bindings[i].bindless_descriptor_index,
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sizeof(sampler_bindings[i].bindless_descriptor_index));
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}
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bindless_sampler_layout_hash = XXH64_digest(&hash_state);
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bindless_sampler_layout_hash = XXH3_64bits_digest(&hash_state);
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}
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// Obtain the unique IDs of binding layouts if there are any texture
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// bindings or bindless samplers, for invalidation in the command processor.
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@@ -95,7 +95,7 @@ class PipelineCache {
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reg::SQ_PROGRAM_CNTL sq_program_cntl;
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static constexpr uint32_t kVersion = 0x20201129;
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static constexpr uint32_t kVersion = 0x20201207;
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});
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// Update PipelineDescription::kVersion if any of the Pipeline* enums are
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@@ -208,7 +208,7 @@ class PipelineCache {
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PipelineRenderTarget render_targets[4];
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static constexpr uint32_t kVersion = 0x20201202;
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static constexpr uint32_t kVersion = 0x20201207;
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});
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XEPACKEDSTRUCT(PipelineStoredDescription, {
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@@ -279,7 +279,7 @@ class PipelineCache {
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// Texture binding layouts of different shaders, for obtaining layout UIDs.
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std::vector<D3D12Shader::TextureBinding> texture_binding_layouts_;
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// Map of texture binding layouts used by shaders, for obtaining UIDs. Keys
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// are XXH64 hashes of layouts, values need manual collision resolution using
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// are XXH3 hashes of layouts, values need manual collision resolution using
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// layout_vector_offset:layout_length of texture_binding_layouts_.
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std::unordered_multimap<uint64_t, LayoutUID,
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xe::hash::IdentityHasher<uint64_t>>
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@@ -287,7 +287,7 @@ class PipelineCache {
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// Bindless sampler indices of different shaders, for obtaining layout UIDs.
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// For bindful, sampler count is used as the UID instead.
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std::vector<uint32_t> bindless_sampler_layouts_;
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// Keys are XXH64 hashes of used bindless sampler indices.
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// Keys are XXH3 hashes of used bindless sampler indices.
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std::unordered_multimap<uint64_t, LayoutUID,
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xe::hash::IdentityHasher<uint64_t>>
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bindless_sampler_layout_map_;
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@@ -9,7 +9,6 @@
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#include "xenia/gpu/d3d12/texture_cache.h"
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#include "third_party/xxhash/xxhash.h"
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#include <algorithm>
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#include <cfloat>
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@@ -21,6 +20,7 @@
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#include "xenia/base/logging.h"
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#include "xenia/base/math.h"
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#include "xenia/base/profiling.h"
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#include "xenia/base/xxhash.h"
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#include "xenia/gpu/d3d12/d3d12_command_processor.h"
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#include "xenia/gpu/gpu_flags.h"
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#include "xenia/gpu/texture_info.h"
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@@ -12,7 +12,7 @@
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#include <cstring>
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#include <memory>
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#include "third_party/xxhash/xxhash.h"
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#include "xenia/base/xxhash.h"
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namespace xe {
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namespace gpu {
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@@ -51,7 +51,7 @@ bool SamplerInfo::Prepare(const xenos::xe_gpu_texture_fetch_t& fetch,
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}
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uint64_t SamplerInfo::hash() const {
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return XXH64(this, sizeof(SamplerInfo), 0);
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return XXH3_64bits(this, sizeof(SamplerInfo));
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}
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} // namespace gpu
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@@ -18,8 +18,7 @@
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#include "xenia/base/math.h"
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#include "xenia/base/memory.h"
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#include "xenia/base/profiling.h"
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#include "third_party/xxhash/xxhash.h"
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#include "xenia/base/xxhash.h"
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namespace xe {
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namespace gpu {
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@@ -16,8 +16,7 @@
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#include "xenia/base/logging.h"
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#include "xenia/base/math.h"
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#include "xenia/base/memory.h"
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#include "third_party/xxhash/xxhash.h"
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#include "xenia/base/xxhash.h"
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namespace xe {
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namespace gpu {
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@@ -319,7 +318,7 @@ bool TextureInfo::GetPackedTileOffset(int packed_tile, uint32_t* offset_x,
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}
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uint64_t TextureInfo::hash() const {
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return XXH64(this, sizeof(TextureInfo), 0);
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return XXH3_64bits(this, sizeof(TextureInfo));
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}
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void TextureInfo::SetupMemoryInfo(uint32_t base_address, uint32_t mip_address) {
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@@ -552,14 +552,14 @@ std::pair<VkBuffer, VkDeviceSize> BufferCache::UploadVertexBuffer(
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}
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void BufferCache::HashVertexBindings(
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XXH64_state_t* hash_state,
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XXH3_state_t* hash_state,
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const std::vector<Shader::VertexBinding>& vertex_bindings) {
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auto& regs = *register_file_;
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for (const auto& vertex_binding : vertex_bindings) {
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#if 0
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XXH64_update(hash_state, &vertex_binding.binding_index, sizeof(vertex_binding.binding_index));
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XXH64_update(hash_state, &vertex_binding.fetch_constant, sizeof(vertex_binding.fetch_constant));
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XXH64_update(hash_state, &vertex_binding.stride_words, sizeof(vertex_binding.stride_words));
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XXH3_64bits_update(hash_state, &vertex_binding.binding_index, sizeof(vertex_binding.binding_index));
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XXH3_64bits_update(hash_state, &vertex_binding.fetch_constant, sizeof(vertex_binding.fetch_constant));
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XXH3_64bits_update(hash_state, &vertex_binding.stride_words, sizeof(vertex_binding.stride_words));
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#endif
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int r = XE_GPU_REG_SHADER_CONSTANT_FETCH_00_0 +
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(vertex_binding.fetch_constant / 3) * 6;
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@@ -567,15 +567,15 @@ void BufferCache::HashVertexBindings(
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switch (vertex_binding.fetch_constant % 3) {
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case 0: {
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auto& fetch = group->vertex_fetch_0;
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XXH64_update(hash_state, &fetch, sizeof(fetch));
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XXH3_64bits_update(hash_state, &fetch, sizeof(fetch));
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} break;
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case 1: {
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auto& fetch = group->vertex_fetch_1;
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XXH64_update(hash_state, &fetch, sizeof(fetch));
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XXH3_64bits_update(hash_state, &fetch, sizeof(fetch));
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} break;
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case 2: {
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auto& fetch = group->vertex_fetch_2;
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XXH64_update(hash_state, &fetch, sizeof(fetch));
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XXH3_64bits_update(hash_state, &fetch, sizeof(fetch));
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} break;
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}
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}
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@@ -585,12 +585,12 @@ VkDescriptorSet BufferCache::PrepareVertexSet(
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VkCommandBuffer command_buffer, VkFence fence,
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const std::vector<Shader::VertexBinding>& vertex_bindings) {
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// (quickly) Generate a hash.
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XXH64_state_t hash_state;
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XXH64_reset(&hash_state, 0);
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XXH3_state_t hash_state;
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XXH3_64bits_reset(&hash_state);
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// (quickly) Generate a hash.
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HashVertexBindings(&hash_state, vertex_bindings);
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uint64_t hash = XXH64_digest(&hash_state);
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uint64_t hash = XXH3_64bits_digest(&hash_state);
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for (auto it = vertex_sets_.find(hash); it != vertex_sets_.end(); ++it) {
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// TODO(DrChat): We need to compare the bindings and ensure they're equal.
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return it->second;
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@@ -10,6 +10,7 @@
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#ifndef XENIA_GPU_VULKAN_BUFFER_CACHE_H_
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#define XENIA_GPU_VULKAN_BUFFER_CACHE_H_
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#include "xenia/base/xxhash.h"
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#include "xenia/gpu/register_file.h"
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#include "xenia/gpu/shader.h"
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#include "xenia/gpu/xenos.h"
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@@ -20,7 +21,6 @@
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#include "xenia/ui/vulkan/vulkan_device.h"
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#include "third_party/vulkan/vk_mem_alloc.h"
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#include "third_party/xxhash/xxhash.h"
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#include <map>
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#include <unordered_map>
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@@ -127,7 +127,7 @@ class BufferCache {
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void FreeConstantDescriptorSet();
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void HashVertexBindings(
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XXH64_state_t* hash_state,
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XXH3_state_t* hash_state,
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const std::vector<Shader::VertexBinding>& vertex_bindings);
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// Allocates a block of memory in the transient buffer.
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@@ -9,11 +9,11 @@
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#include "xenia/gpu/vulkan/pipeline_cache.h"
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#include "third_party/xxhash/xxhash.h"
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#include "xenia/base/logging.h"
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#include "xenia/base/math.h"
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#include "xenia/base/memory.h"
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#include "xenia/base/profiling.h"
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#include "xenia/base/xxhash.h"
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#include "xenia/gpu/gpu_flags.h"
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#include "xenia/gpu/vulkan/vulkan_gpu_flags.h"
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@@ -208,7 +208,8 @@ VulkanShader* PipelineCache::LoadShader(xenos::ShaderType shader_type,
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const uint32_t* host_address,
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uint32_t dword_count) {
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// Hash the input memory and lookup the shader.
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uint64_t data_hash = XXH64(host_address, dword_count * sizeof(uint32_t), 0);
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uint64_t data_hash =
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XXH3_64bits(host_address, dword_count * sizeof(uint32_t));
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auto it = shader_map_.find(data_hash);
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if (it != shader_map_.end()) {
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// Shader has been previously loaded.
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@@ -259,7 +260,7 @@ PipelineCache::UpdateStatus PipelineCache::ConfigurePipeline(
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}
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if (!pipeline) {
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// Should have a hash key produced by the UpdateState pass.
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uint64_t hash_key = XXH64_digest(&hash_state_);
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uint64_t hash_key = XXH3_64bits_digest(&hash_state_);
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pipeline = GetPipeline(render_state, hash_key);
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current_pipeline_ = pipeline;
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if (!pipeline) {
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@@ -961,7 +962,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateState(
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bool mismatch = false;
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// Reset hash so we can build it up.
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XXH64_reset(&hash_state_, 0);
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XXH3_64bits_reset(&hash_state_);
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#define CHECK_UPDATE_STATUS(status, mismatch, error_message) \
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{ \
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@@ -1028,7 +1029,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRenderTargetState() {
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regs.rb_color1_info.color_format = cur_regs->rb_color1_info.color_format;
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regs.rb_color2_info.color_format = cur_regs->rb_color2_info.color_format;
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regs.rb_color3_info.color_format = cur_regs->rb_color3_info.color_format;
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XXH64_update(&hash_state_, ®s, sizeof(regs));
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XXH3_64bits_update(&hash_state_, ®s, sizeof(regs));
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if (!dirty) {
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return UpdateStatus::kCompatible;
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}
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@@ -1061,7 +1062,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateShaderStages(
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regs.vertex_shader = vertex_shader;
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regs.pixel_shader = pixel_shader;
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regs.primitive_type = primitive_type;
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XXH64_update(&hash_state_, ®s, sizeof(regs));
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XXH3_64bits_update(&hash_state_, ®s, sizeof(regs));
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if (!dirty) {
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return UpdateStatus::kCompatible;
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}
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@@ -1148,7 +1149,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateVertexInputState(
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bool dirty = false;
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dirty |= vertex_shader != regs.vertex_shader;
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regs.vertex_shader = vertex_shader;
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XXH64_update(&hash_state_, ®s, sizeof(regs));
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XXH3_64bits_update(&hash_state_, ®s, sizeof(regs));
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if (!dirty) {
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return UpdateStatus::kCompatible;
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}
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@@ -1177,7 +1178,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateInputAssemblyState(
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dirty |= SetShadowRegister(®s.multi_prim_ib_reset_index,
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XE_GPU_REG_VGT_MULTI_PRIM_IB_RESET_INDX);
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regs.primitive_type = primitive_type;
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XXH64_update(&hash_state_, ®s, sizeof(regs));
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XXH3_64bits_update(&hash_state_, ®s, sizeof(regs));
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if (!dirty) {
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return UpdateStatus::kCompatible;
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}
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@@ -1303,7 +1304,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizationState(
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dirty = true;
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}
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XXH64_update(&hash_state_, ®s, sizeof(regs));
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XXH3_64bits_update(&hash_state_, ®s, sizeof(regs));
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if (!dirty) {
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return UpdateStatus::kCompatible;
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}
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@@ -1385,7 +1386,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateMultisampleState() {
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dirty |= SetShadowRegister(®s.pa_su_sc_mode_cntl,
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XE_GPU_REG_PA_SU_SC_MODE_CNTL);
|
||||
dirty |= SetShadowRegister(®s.rb_surface_info, XE_GPU_REG_RB_SURFACE_INFO);
|
||||
XXH64_update(&hash_state_, ®s, sizeof(regs));
|
||||
XXH3_64bits_update(&hash_state_, ®s, sizeof(regs));
|
||||
if (!dirty) {
|
||||
return UpdateStatus::kCompatible;
|
||||
}
|
||||
@@ -1437,7 +1438,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateDepthStencilState() {
|
||||
dirty |= SetShadowRegister(®s.rb_depthcontrol, XE_GPU_REG_RB_DEPTHCONTROL);
|
||||
dirty |=
|
||||
SetShadowRegister(®s.rb_stencilrefmask, XE_GPU_REG_RB_STENCILREFMASK);
|
||||
XXH64_update(&hash_state_, ®s, sizeof(regs));
|
||||
XXH3_64bits_update(&hash_state_, ®s, sizeof(regs));
|
||||
if (!dirty) {
|
||||
return UpdateStatus::kCompatible;
|
||||
}
|
||||
@@ -1526,7 +1527,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateColorBlendState() {
|
||||
dirty |=
|
||||
SetShadowRegister(®s.rb_blendcontrol[3], XE_GPU_REG_RB_BLENDCONTROL3);
|
||||
dirty |= SetShadowRegister(®s.rb_modecontrol, XE_GPU_REG_RB_MODECONTROL);
|
||||
XXH64_update(&hash_state_, ®s, sizeof(regs));
|
||||
XXH3_64bits_update(&hash_state_, ®s, sizeof(regs));
|
||||
if (!dirty) {
|
||||
return UpdateStatus::kCompatible;
|
||||
}
|
||||
|
||||
@@ -12,8 +12,7 @@
|
||||
|
||||
#include <unordered_map>
|
||||
|
||||
#include "third_party/xxhash/xxhash.h"
|
||||
|
||||
#include "xenia/base/xxhash.h"
|
||||
#include "xenia/gpu/register_file.h"
|
||||
#include "xenia/gpu/spirv_shader_translator.h"
|
||||
#include "xenia/gpu/vulkan/render_cache.h"
|
||||
@@ -121,7 +120,7 @@ class PipelineCache {
|
||||
// Hash state used to incrementally produce pipeline hashes during update.
|
||||
// By the time the full update pass has run the hash will represent the
|
||||
// current state in a way that can uniquely identify the produced VkPipeline.
|
||||
XXH64_state_t hash_state_;
|
||||
XXH3_state_t hash_state_;
|
||||
// All previously generated pipelines mapped by hash.
|
||||
std::unordered_map<uint64_t, VkPipeline> cached_pipelines_;
|
||||
|
||||
|
||||
@@ -1377,7 +1377,7 @@ void TextureCache::WritebackTexture(Texture* texture) {
|
||||
}
|
||||
|
||||
void TextureCache::HashTextureBindings(
|
||||
XXH64_state_t* hash_state, uint32_t& fetch_mask,
|
||||
XXH3_state_t* hash_state, uint32_t& fetch_mask,
|
||||
const std::vector<Shader::TextureBinding>& bindings) {
|
||||
for (auto& binding : bindings) {
|
||||
uint32_t fetch_bit = 1 << binding.fetch_constant;
|
||||
@@ -1393,7 +1393,7 @@ void TextureCache::HashTextureBindings(
|
||||
reinterpret_cast<const xenos::xe_gpu_fetch_group_t*>(®s.values[r]);
|
||||
auto& fetch = group->texture_fetch;
|
||||
|
||||
XXH64_update(hash_state, &fetch, sizeof(fetch));
|
||||
XXH3_64bits_update(hash_state, &fetch, sizeof(fetch));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1401,14 +1401,14 @@ VkDescriptorSet TextureCache::PrepareTextureSet(
|
||||
VkCommandBuffer command_buffer, VkFence completion_fence,
|
||||
const std::vector<Shader::TextureBinding>& vertex_bindings,
|
||||
const std::vector<Shader::TextureBinding>& pixel_bindings) {
|
||||
XXH64_state_t hash_state;
|
||||
XXH64_reset(&hash_state, 0);
|
||||
XXH3_state_t hash_state;
|
||||
XXH3_64bits_reset(&hash_state);
|
||||
|
||||
// (quickly) Generate a hash.
|
||||
uint32_t fetch_mask = 0;
|
||||
HashTextureBindings(&hash_state, fetch_mask, vertex_bindings);
|
||||
HashTextureBindings(&hash_state, fetch_mask, pixel_bindings);
|
||||
uint64_t hash = XXH64_digest(&hash_state);
|
||||
uint64_t hash = XXH3_64bits_digest(&hash_state);
|
||||
for (auto it = texture_sets_.find(hash); it != texture_sets_.end(); ++it) {
|
||||
// TODO(DrChat): We need to compare the bindings and ensure they're equal.
|
||||
return it->second;
|
||||
|
||||
@@ -186,7 +186,7 @@ class TextureCache {
|
||||
bool UploadTexture(VkCommandBuffer command_buffer, VkFence completion_fence,
|
||||
Texture* dest, const TextureInfo& src);
|
||||
|
||||
void HashTextureBindings(XXH64_state_t* hash_state, uint32_t& fetch_mask,
|
||||
void HashTextureBindings(XXH3_state_t* hash_state, uint32_t& fetch_mask,
|
||||
const std::vector<Shader::TextureBinding>& bindings);
|
||||
bool SetupTextureBindings(
|
||||
VkCommandBuffer command_buffer, VkFence completion_fence,
|
||||
|
||||
Reference in New Issue
Block a user