Preload ThreeFloatMask in DOT_PRODUCT_3

Use shuffle_ps instead of broadcastss, broadcastss is slower on many intel and amd processors and encodes to the same number of bytes as shuffle_ps
Detect and optimize away PERMUTE with a zero src2 and src3 in constant_propagation_pass instead of in the x64 sequence
For constant PERMUTE, do the Xor/And prior to LoadConstantXmm instead of in the generated code
Simplified code for PERMUTE
Added simplification rule that detects (lzcnt(x) >> log2(bitsizeof_x)) == ( x == 0)
Added set_srcN(value, idx) which can be used to set the nth source of an instruction, which makes more sense than having three different functions that only differ by the field they touch
Added Value::VisitValueOperands for iterating all Value operands an instruction has.
Add BackpropTruncations code to simplification_pass
Changed the (void**) dereferences of raw_context that are done to grab thread_state to instead reference PPCContext and the thread_state field. Moved the thread_state field to the tail of PPCContext.
Moved membase to the tail of PPCContext, since now it is reloaded very infrequently.
Rearranged PPCContext so that the condition registers come first (most accesses to them cant get SSA'd), moved lr and ctr to after gp regs since they are not accessed as much as the main gpregs. This way the most frequently
accessed registers will be accessible via a rel8 displacement instead of rel32 (ideally, we would have only certain CRs at the start, but xenia does pointer arithmetic on CR0's offset to get CRn)
Use alignas(64) to ensure PPCContext's padding
Map PPCContext specially so that the low 32 bits of the context register is 0xE0000000, for the 4k page offset check. Also allocate the page before, so that backends can store their own information that is not relevant to the PPCContext on that page and
reference that data in the generated asm via 8-bit signed displ or 32-bit signed displ. Currently this page is not being utilized, but I plan on stashing some data critical to the x86 backend there
Changed many wrong avx instructions, they worked but they were not intended for the data they operated on, meaning they transferred domains and caused 1-2 cycle stall each time
Added SimdDomain checking/deduction to X64Emitter.
Used SimdDomain code to fix a lot of float/int domain stalls

Use the low 32 bits of the context register instead of constant 0xE0000000 in ComputeAddress
Special path for SELECT_V128 with result of comparison that will use a blend instruction instead of and/or
Many HIR optimizations added in simp pass
A bunch of other stuff running out of time to write this msg

src/xenia/cpu/thread_state.cc

@@ -18,12 +18,50 @@
 #include "xenia/cpu/processor.h"
 
 #include "xenia/xbox.h"
-
 namespace xe {
 namespace cpu {
 
 thread_local ThreadState* thread_state_ = nullptr;
 
+static void* AllocateContext() {
+  size_t granularity = xe::memory::allocation_granularity();
+  for (unsigned pos32 = 0x40; pos32 < 8192; ++pos32) {
+    /*
+        we want our register which points to the context to have 0xE0000000 in
+       the low 32 bits, for checking for whether we need the 4k offset, but also
+       if we allocate starting from the page before we allow backends to index
+       negatively to get to their own backend specific data, which makes full
+        use of int8 displacement
+
+
+        the downside is we waste most of one granula and probably a fair bit of
+       the one starting at 0xE0 by using a direct virtual memory allocation
+       instead of malloc
+    */
+    uintptr_t context_pre =
+        ((static_cast<uint64_t>(pos32) << 32) | 0xE0000000) - granularity;
+
+    void* p = memory::AllocFixed(
+        (void*)context_pre, granularity + sizeof(ppc::PPCContext),
+        memory::AllocationType::kReserveCommit, memory::PageAccess::kReadWrite);
+    if (p) {
+      return reinterpret_cast<char*>(p) +
+             granularity;  // now we have a ctx ptr with the e0 constant in low,
+                           // and one page allocated before it
+    }
+  }
+
+  assert_always("giving up on allocating context, likely leaking contexts");
+  return nullptr;
+}
+
+static void FreeContext(void* ctx) {
+  char* true_start_of_ctx = &reinterpret_cast<char*>(
+      ctx)[-static_cast<ptrdiff_t>(xe::memory::allocation_granularity())];
+  memory::DeallocFixed(true_start_of_ctx, 0,
+                       memory::DeallocationType::kRelease);
+}
+
 ThreadState::ThreadState(Processor* processor, uint32_t thread_id,
                          uint32_t stack_base, uint32_t pcr_address)
     : processor_(processor),
@@ -38,7 +76,9 @@ ThreadState::ThreadState(Processor* processor, uint32_t thread_id,
   backend_data_ = processor->backend()->AllocThreadData();
 
   // Allocate with 64b alignment.
-  context_ = memory::AlignedAlloc<ppc::PPCContext>(64);
+
+  context_ = reinterpret_cast<ppc::PPCContext*>(AllocateContext());  // memory::AlignedAlloc<ppc::PPCContext>(64);
+  processor->backend()->InitializeBackendContext(context_);
   assert_true(((uint64_t)context_ & 0x3F) == 0);
   std::memset(context_, 0, sizeof(ppc::PPCContext));
 
@@ -62,8 +102,10 @@ ThreadState::~ThreadState() {
   if (thread_state_ == this) {
     thread_state_ = nullptr;
   }
-
-  memory::AlignedFree(context_);
+  if (context_) {
+    FreeContext(reinterpret_cast<void*>(context_));
+  }
+ // memory::AlignedFree(context_);
 }
 
 void ThreadState::Bind(ThreadState* thread_state) {