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[GPU] XeSL host depth store and VS passthrough shaders

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Triang3l
2022-03-27 16:15:53 +03:00
parent 2cd6c31998
commit 3a07559df9
66 changed files with 2622 additions and 1585 deletions
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50
src/xenia/gpu/shaders/edram.xesli Normal file
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/**
******************************************************************************
* Xenia : Xbox 360 Emulator Research Project *
******************************************************************************
* Copyright 2022 Ben Vanik. All rights reserved. *
* Released under the BSD license - see LICENSE in the root for more details. *
******************************************************************************
*/
#ifndef XENIA_GPU_SHADERS_EDRAM_XESLI_
#define XENIA_GPU_SHADERS_EDRAM_XESLI_
#include "pixel_formats.xesli"
#define kXenosMsaaSamples_1X 0u
#define kXenosMsaaSamples_2X 1u
#define kXenosMsaaSamples_4X 2u
uint XeEdramOffsetInts(xesl_uint2 pixel_index, uint base_tiles,
uint pitch_tiles, uint msaa_samples, bool is_depth,
uint format_ints_log2, uint pixel_sample_index,
xesl_uint2 resolution_scale) {
xesl_uint2 rt_sample_index =
pixel_index <<
xesl_uint2(xesl_greaterThanEqual(
msaa_samples.xx,
xesl_uint2(kXenosMsaaSamples_4X, kXenosMsaaSamples_2X)));
rt_sample_index += (pixel_sample_index.xx >> xesl_uint2(1u, 0u)) & 1u;
// For now, while the actual storage of 64bpp render targets in comparison to
// 32bpp is not known, storing 40x16 64bpp samples per tile for simplicity of
// addressing in different scenarios.
xesl_uint2 tile_size_at_32bpp = xesl_uint2(80u, 16u) * resolution_scale;
xesl_uint2 tile_size_samples =
tile_size_at_32bpp >> xesl_uint2(format_ints_log2, 0u);
xesl_uint2 tile_offset_xy = rt_sample_index / tile_size_samples;
base_tiles += tile_offset_xy.y * pitch_tiles + tile_offset_xy.x;
rt_sample_index -= tile_offset_xy * tile_size_samples;
if (is_depth) {
uint tile_width_half = tile_size_samples.x >> 1u;
rt_sample_index.x =
uint(int(rt_sample_index.x) +
((rt_sample_index.x >= tile_width_half) ? -int(tile_width_half)
: int(tile_width_half)));
}
return base_tiles * (tile_size_at_32bpp.x * tile_size_at_32bpp.y) +
((rt_sample_index.y * tile_size_samples.x + rt_sample_index.x) <<
format_ints_log2);
}
#endif // XENIA_GPU_SHADERS_EDRAM_XESLI_