[GPU] EDRAM looped addressing (resolves #2031)
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@@ -412,13 +412,13 @@ class VulkanRenderTargetCache final : public RenderTargetCache {
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// Same as RenderTargetKey::pitch_tiles_at_32bpp.
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uint32_t pitch_tiles_at_32bpp : 8; // 8
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// [0, 2047].
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uint32_t depth_base_tiles : xenos::kEdramBaseTilesBits - 1; // 19
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uint32_t color_0_base_tiles : xenos::kEdramBaseTilesBits - 1; // 30
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uint32_t depth_base_tiles : xenos::kEdramBaseTilesBits; // 19
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uint32_t color_0_base_tiles : xenos::kEdramBaseTilesBits; // 30
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uint32_t color_1_base_tiles : xenos::kEdramBaseTilesBits - 1; // 43
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uint32_t color_2_base_tiles : xenos::kEdramBaseTilesBits - 1; // 54
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uint32_t color_1_base_tiles : xenos::kEdramBaseTilesBits; // 43
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uint32_t color_2_base_tiles : xenos::kEdramBaseTilesBits; // 54
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uint32_t color_3_base_tiles : xenos::kEdramBaseTilesBits - 1; // 75
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uint32_t color_3_base_tiles : xenos::kEdramBaseTilesBits; // 75
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// Including all the padding, for a stable hash.
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FramebufferKey() { Reset(); }
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@@ -619,16 +619,13 @@ class VulkanRenderTargetCache final : public RenderTargetCache {
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// All in tiles.
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uint32_t dest_pitch : xenos::kEdramPitchTilesBits;
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uint32_t source_pitch : xenos::kEdramPitchTilesBits;
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// Safe to use 12 bits for signed difference - no ownership transfer can
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// ever occur between render targets with EDRAM base >= 2048 as this would
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// result in 0-length spans. 10 + 10 + 12 is exactly 32, any more bits,
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// and more root 32-bit constants will be used.
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// Destination base in tiles minus source base in tiles (not vice versa
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// because this is a transform of the coordinate system, not addresses
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// themselves).
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// + 1 bit because this is a signed difference between two EDRAM bases.
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// 0 for host_depth_source_is_copy (ignored in this case anyway as
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// destination == source anyway).
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int32_t source_to_dest : xenos::kEdramBaseTilesBits;
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int32_t source_to_dest : xenos::kEdramBaseTilesBits + 1;
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};
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TransferAddressConstant() : constant(0) {
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static_assert_size(*this, sizeof(constant));
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@@ -746,7 +743,9 @@ class VulkanRenderTargetCache final : public RenderTargetCache {
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union DumpOffsets {
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uint32_t offsets;
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struct {
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uint32_t dispatch_first_tile : xenos::kEdramBaseTilesBits;
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// May be beyond the EDRAM tile count in case of EDRAM addressing
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// wrapping, thus + 1 bit.
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uint32_t dispatch_first_tile : xenos::kEdramBaseTilesBits + 1;
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uint32_t source_base_tiles : xenos::kEdramBaseTilesBits;
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};
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DumpOffsets() : offsets(0) { static_assert_size(*this, sizeof(offsets)); }
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