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Fixing div.

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Ben Vanik
2013-12-25 23:16:27 -08:00
parent 8e3ca029c2
commit 3db93f781c
1 changed files with 4 additions and 4 deletions
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8
src/alloy/backend/ivm/ivm_intcode.cc
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@@ -2209,19 +2209,19 @@ int Translate_MUL(TranslationContext& ctx, Instr* i) {
} }
uint32_t IntCode_DIV_I8(IntCodeState& ics, const IntCode* i) { uint32_t IntCode_DIV_I8(IntCodeState& ics, const IntCode* i) {
ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 / ics.rf[i->src2_reg].i8; ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 / ics.rf[i->src2_reg].u8;
return IA_NEXT; return IA_NEXT;
} }
uint32_t IntCode_DIV_I16(IntCodeState& ics, const IntCode* i) { uint32_t IntCode_DIV_I16(IntCodeState& ics, const IntCode* i) {
ics.rf[i->dest_reg].i16 = ics.rf[i->src1_reg].i16 / ics.rf[i->src2_reg].i16; ics.rf[i->dest_reg].i16 = ics.rf[i->src1_reg].u16 / ics.rf[i->src2_reg].u16;
return IA_NEXT; return IA_NEXT;
} }
uint32_t IntCode_DIV_I32(IntCodeState& ics, const IntCode* i) { uint32_t IntCode_DIV_I32(IntCodeState& ics, const IntCode* i) {
ics.rf[i->dest_reg].i32 = ics.rf[i->src1_reg].i32 / ics.rf[i->src2_reg].i32; ics.rf[i->dest_reg].i32 = ics.rf[i->src1_reg].u32 / ics.rf[i->src2_reg].u32;
return IA_NEXT; return IA_NEXT;
} }
uint32_t IntCode_DIV_I64(IntCodeState& ics, const IntCode* i) { uint32_t IntCode_DIV_I64(IntCodeState& ics, const IntCode* i) {
ics.rf[i->dest_reg].i64 = ics.rf[i->src1_reg].i64 / ics.rf[i->src2_reg].i64; ics.rf[i->dest_reg].i64 = ics.rf[i->src1_reg].u64 / ics.rf[i->src2_reg].u64;
return IA_NEXT; return IA_NEXT;
} }
uint32_t IntCode_DIV_F32(IntCodeState& ics, const IntCode* i) { uint32_t IntCode_DIV_F32(IntCodeState& ics, const IntCode* i) {