Tests for nor and neg.

src/alloy/frontend/ppc/test/bin/instr_neg.dis

@@ -0,0 +1,17 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_neg.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_neg_1>:
+  100000:	7c 63 00 d0 	neg     r3,r3
+  100004:	4e 80 00 20 	blr
+
+0000000000100008 <test_neg_2>:
+  100008:	7c 63 00 d0 	neg     r3,r3
+  10000c:	4e 80 00 20 	blr
+
+0000000000100010 <test_neg_3>:
+  100010:	7c 63 00 d0 	neg     r3,r3
+  100014:	4e 80 00 20 	blr

src/alloy/frontend/ppc/test/bin/instr_neg.map

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+0000000000000000 t test_neg_1
+0000000000000008 t test_neg_2
+0000000000000010 t test_neg_3

src/alloy/frontend/ppc/test/bin/instr_nor.dis

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+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_nor.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_nor_cr_1>:
+  100000:	7c 63 18 f9 	not.    r3,r3
+  100004:	38 60 00 00 	li      r3,0
+  100008:	40 82 00 08 	bne     100010 <.nor_cr_1_ne>
+  10000c:	38 60 00 01 	li      r3,1
+
+0000000000100010 <.nor_cr_1_ne>:
+  100010:	4e 80 00 20 	blr

src/alloy/frontend/ppc/test/bin/instr_nor.map

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+0000000000000000 t test_nor_cr_1
+0000000000000010 t .nor_cr_1_ne

src/alloy/frontend/ppc/test/instr_neg.s

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+test_neg_1:
+  #_ REGISTER_IN r3 0x0000000080000000
+  neg r3, r3
+  blr
+  #_ REGISTER_OUT r3 0xFFFFFFFF80000000
+
+test_neg_2:
+  #_ REGISTER_IN r3 0x8000000000000000
+  neg r3, r3
+  blr
+  #_ REGISTER_OUT r3 0x8000000000000000
+
+test_neg_3:
+  #_ REGISTER_IN r3 0x0000000000000005
+  neg r3, r3
+  blr
+  #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFFFB

src/alloy/frontend/ppc/test/instr_nor.s

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+test_nor_cr_1:
+  #_ REGISTER_IN r3 0x00000000FFFFFFFF
+  nor. r3, r3, r3
+  li r3, 0
+  bne .nor_cr_1_ne
+  li r3, 1
+  .nor_cr_1_ne:
+  blr
+  #_ REGISTER_OUT r3 1