Shrinking alloy memory interface so that alloy-sandbox doesn't need xe.
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@@ -1499,7 +1499,9 @@ int Translate_LOAD(TranslationContext& ctx, Instr* i) {
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void MarkPageDirty(IntCodeState& ics, uint32_t address) {
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// 16KB pages.
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ics.page_table[(address >> 14) & 0x7FFF] = 1;
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if (ics.page_table) {
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ics.page_table[(address >> 14) & 0x7FFF] = 1;
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}
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}
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uint32_t IntCode_STORE_I8(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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@@ -1557,9 +1557,12 @@ EMITTER_OPCODE_TABLE(
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// Note: most *should* be aligned, but needs to be checked!
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void EmitMarkPageDirty(X64Emitter& e, RegExp& addr) {
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// 16KB pages.
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e.shr(e.eax, 14);
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e.and(e.eax, 0x7FFF);
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e.mov(e.byte[e.rdx + e.rax + e.page_table_address()], 1);
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auto page_table_address = e.page_table_address();
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if (page_table_address) {
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e.shr(e.eax, 14);
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e.and(e.eax, 0x7FFF);
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e.mov(e.byte[e.rdx + e.rax + page_table_address], 1);
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}
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}
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EMITTER(STORE_I8, MATCH(I<OPCODE_STORE, VoidOp, I64<>, I8<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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