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A probably-working register allocator.

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This commit is contained in:
Ben Vanik
2014-02-10 21:16:38 -08:00
parent 6bd214af0b
commit 4a584129d2
13 changed files with 613 additions and 29 deletions
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6
src/alloy/compiler/passes/control_flow_analysis_pass.cc
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@@ -41,19 +41,21 @@ int ControlFlowAnalysisPass::Run(HIRBuilder* builder) {
// Add edges.
auto block = builder->first_block();
while (block) {
auto instr = block->instr_head;
auto instr = block->instr_tail;
while (instr) {
if (instr->opcode->flags & OPCODE_FLAG_BRANCH) {
if (instr->opcode == &OPCODE_BRANCH_info) {
auto label = instr->src1.label;
builder->AddEdge(block, label->block, Edge::UNCONDITIONAL);
break;
} else if (instr->opcode == &OPCODE_BRANCH_TRUE_info ||
instr->opcode == &OPCODE_BRANCH_FALSE_info) {
auto label = instr->src2.label;
builder->AddEdge(block, label->block, 0);
break;
}
}
instr = instr->next;
instr = instr->prev;
}
block = block->next;
}