[D3D12] 32bpp and 20e4 clearing in resolves
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@@ -399,6 +399,10 @@ class RenderTargetCache {
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uint32_t edram_base, uint32_t surface_pitch,
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MsaaSamples msaa_samples, bool is_depth, uint32_t src_format,
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const D3D12_RECT& src_rect);
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// Performs the clearing part of a resolve.
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bool ResolveClear(uint32_t edram_base, uint32_t surface_pitch,
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MsaaSamples msaa_samples, bool is_depth, uint32_t format,
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const D3D12_RECT& rect);
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ID3D12PipelineState* GetResolvePipeline(DXGI_FORMAT dest_format);
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// Returns any available resolve target placed at least at
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@@ -416,8 +420,9 @@ class RenderTargetCache {
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D3D12_RESOURCE_STATES edram_buffer_state_;
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bool edram_buffer_cleared_;
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// EDRAM buffer load/store root signature.
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// EDRAM root signatures.
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ID3D12RootSignature* edram_load_store_root_signature_ = nullptr;
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ID3D12RootSignature* edram_clear_root_signature_ = nullptr;
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struct EDRAMLoadStoreRootConstants {
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union {
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struct {
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@@ -443,11 +448,26 @@ class RenderTargetCache {
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// For 64 bits per pixel, it's 1 if need to swap 0:15 and 32:47.
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uint32_t tile_sample_dest_info;
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};
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struct {
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// 16 bits for X, 16 bits for Y.
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uint32_t clear_rect_lt;
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uint32_t clear_rect_rb;
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union {
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struct {
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uint32_t clear_color_high;
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uint32_t clear_color_low;
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};
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struct {
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uint32_t clear_depth24;
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uint32_t clear_depth32;
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};
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};
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};
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};
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// Base in the lower 11 bits, pitch above.
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uint32_t base_pitch_tiles;
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};
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// EDRAM buffer load/store pipelines.
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// EDRAM pipelines.
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static const EDRAMLoadStoreModeInfo
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edram_load_store_mode_info_[size_t(EDRAMLoadStoreMode::kCount)];
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ID3D12PipelineState*
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@@ -455,6 +475,8 @@ class RenderTargetCache {
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ID3D12PipelineState*
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edram_store_pipelines_[size_t(EDRAMLoadStoreMode::kCount)] = {};
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ID3D12PipelineState* edram_tile_sample_32bpp_pipeline_ = nullptr;
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ID3D12PipelineState* edram_clear_32bpp_pipeline_ = nullptr;
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ID3D12PipelineState* edram_clear_depth_float_pipeline_ = nullptr;
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// 48 MB heaps backing used render targets resources, created when needed.
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// 24 MB proved to be not enough to store a single render target occupying the
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