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[GPU] Primitive processor with Vulkan 1.0 base cases, 24-bit indices and clamping

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Triang3l
2021-06-04 23:56:25 +03:00
parent 10ff77a24f
commit 538aa91015
52 changed files with 5418 additions and 3638 deletions
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src/xenia/gpu/register_table.inc
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@@ -342,6 +342,8 @@ XE_GPU_REGISTER(0x2184, kDword, SQ_WRAPPING_1)
// These three registers are set by the command processor.
XE_GPU_REGISTER(0x21F9, kDword, VGT_EVENT_INITIATOR)
XE_GPU_REGISTER(0x21FA, kDword, VGT_DMA_BASE)
XE_GPU_REGISTER(0x21FB, kDword, VGT_DMA_SIZE)
XE_GPU_REGISTER(0x21FC, kDword, VGT_DRAW_INITIATOR)
XE_GPU_REGISTER(0x21FD, kDword, VGT_IMMED_DATA)