Preventing emulated instructions from stomping the xmm registers.
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@@ -3489,7 +3489,7 @@ EMITTER(POW2_F32, MATCH(I<OPCODE_POW2, F32<>, F32<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERTALWAYS();
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e.lea(e.r8, e.StashXmm(i.src1));
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e.CallNative(EmulatePow2);
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e.CallNativeSafe(EmulatePow2);
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e.vmovaps(i.dest, e.xmm0);
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}
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};
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@@ -3501,7 +3501,7 @@ EMITTER(POW2_F64, MATCH(I<OPCODE_POW2, F64<>, F64<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERTALWAYS();
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e.lea(e.r8, e.StashXmm(i.src1));
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e.CallNative(EmulatePow2);
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e.CallNativeSafe(EmulatePow2);
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e.vmovaps(i.dest, e.xmm0);
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}
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};
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@@ -3515,7 +3515,7 @@ EMITTER(POW2_V128, MATCH(I<OPCODE_POW2, V128<>, V128<>>)) {
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}
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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e.lea(e.r8, e.StashXmm(i.src1));
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e.CallNative(EmulatePow2);
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e.CallNativeSafe(EmulatePow2);
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e.vmovaps(i.dest, e.xmm0);
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}
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};
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@@ -3540,7 +3540,7 @@ EMITTER(LOG2_F32, MATCH(I<OPCODE_LOG2, F32<>, F32<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERTALWAYS();
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e.lea(e.r8, e.StashXmm(i.src1));
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e.CallNative(EmulateLog2);
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e.CallNativeSafe(EmulateLog2);
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e.vmovaps(i.dest, e.xmm0);
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}
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};
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@@ -3552,7 +3552,7 @@ EMITTER(LOG2_F64, MATCH(I<OPCODE_LOG2, F64<>, F64<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERTALWAYS();
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e.lea(e.r8, e.StashXmm(i.src1));
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e.CallNative(EmulateLog2);
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e.CallNativeSafe(EmulateLog2);
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e.vmovaps(i.dest, e.xmm0);
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}
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};
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@@ -3565,9 +3565,8 @@ EMITTER(LOG2_V128, MATCH(I<OPCODE_LOG2, V128<>, V128<>>)) {
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return result;
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}
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERTALWAYS();
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e.lea(e.r8, e.StashXmm(i.src1));
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e.CallNative(EmulateLog2);
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e.CallNativeSafe(EmulateLog2);
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e.vmovaps(i.dest, e.xmm0);
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}
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};
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