Fixing stvl/stvr.

2014-10-26 02:01:02 -07:00
parent 9649eb0e8d
commit 5bec5bb203
9 changed files with 44 additions and 16 deletions
--- a/src/alloy/frontend/ppc/test/bin/instr_stvl.bin
+++ b/src/alloy/frontend/ppc/test/bin/instr_stvl.bin
--- a/src/alloy/frontend/ppc/test/bin/instr_stvl.dis
+++ b/src/alloy/frontend/ppc/test/bin/instr_stvl.dis
@@ -7,3 +7,7 @@ Disassembly of section .text:
 0000000000100000 <test_stvl_1>:
  100000:	7c 64 05 0e 	stvlx   v3,r4,r0
  100004:	4e 80 00 20 	blr
+
+0000000000100008 <test_stvl_2>:
+  100008:	7c 64 05 0e 	stvlx   v3,r4,r0
+  10000c:	4e 80 00 20 	blr
--- a/src/alloy/frontend/ppc/test/bin/instr_stvl.map
+++ b/src/alloy/frontend/ppc/test/bin/instr_stvl.map
@@ -1 +1,2 @@
 0000000000000000 t test_stvl_1
+0000000000000008 t test_stvl_2
--- a/src/alloy/frontend/ppc/test/bin/instr_stvr.bin
+++ b/src/alloy/frontend/ppc/test/bin/instr_stvr.bin
--- a/src/alloy/frontend/ppc/test/bin/instr_stvr.dis
+++ b/src/alloy/frontend/ppc/test/bin/instr_stvr.dis
@@ -7,3 +7,7 @@ Disassembly of section .text:
 0000000000100000 <test_stvr_1>:
  100000:	7c 64 2d 4e 	stvrx   v3,r4,r5
  100004:	4e 80 00 20 	blr
+
+0000000000100008 <test_stvr_2>:
+  100008:	7c 64 05 4e 	stvrx   v3,r4,r0
+  10000c:	4e 80 00 20 	blr
--- a/src/alloy/frontend/ppc/test/bin/instr_stvr.map
+++ b/src/alloy/frontend/ppc/test/bin/instr_stvr.map
@@ -1 +1,2 @@
 0000000000000000 t test_stvr_1
+0000000000000008 t test_stvr_2