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[GPU] Ignore z_enable for !z_write_enable && z_func == ALWAYS

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Triang3l
2022-04-27 21:46:29 +03:00
parent 5519dbb39f
commit 5ec0c92601
10 changed files with 100 additions and 60 deletions
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7
src/xenia/gpu/render_target_cache.cc
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@@ -2,7 +2,7 @@
******************************************************************************
* Xenia : Xbox 360 Emulator Research Project *
******************************************************************************
* Copyright 2021 Ben Vanik. All rights reserved. *
* Copyright 2022 Ben Vanik. All rights reserved. *
* Released under the BSD license - see LICENSE in the root for more details. *
******************************************************************************
*/
@@ -366,6 +366,7 @@ void RenderTargetCache::ClearCache() {
void RenderTargetCache::BeginFrame() { ResetAccumulatedRenderTargets(); }
bool RenderTargetCache::Update(bool is_rasterization_done,
reg::RB_DEPTHCONTROL normalized_depth_control,
uint32_t normalized_color_mask) {
const RegisterFile& regs = register_file();
bool interlock_barrier_only = GetPath() == Path::kPixelShaderInterlock;
@@ -429,8 +430,8 @@ bool RenderTargetCache::Update(bool is_rasterization_done,
uint32_t rts_are_64bpp = 0;
uint32_t color_rts_are_gamma = 0;
if (is_rasterization_done) {
auto rb_depthcontrol = draw_util::GetDepthControlForCurrentEdramMode(regs);
if (rb_depthcontrol.z_enable || rb_depthcontrol.stencil_enable) {
if (normalized_depth_control.z_enable ||
normalized_depth_control.stencil_enable) {
depth_and_color_rts_used_bits |= 1;
auto rb_depth_info = regs.Get<reg::RB_DEPTH_INFO>();
// std::min for safety, to avoid negative numbers in case it's completely