Merge remote-tracking branch 'xenia-master/master' into canary_experimental
This commit is contained in:
@@ -509,48 +509,6 @@ D3D12CommandProcessor::GetSystemBindlessViewHandlePair(
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view_bindless_heap_gpu_start_, uint32_t(view)));
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}
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ui::d3d12::util::DescriptorCpuGpuHandlePair
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D3D12CommandProcessor::GetSharedMemoryUintPow2BindlessSRVHandlePair(
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uint32_t element_size_bytes_pow2) const {
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SystemBindlessView view;
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switch (element_size_bytes_pow2) {
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case 2:
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view = SystemBindlessView::kSharedMemoryR32UintSRV;
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break;
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case 3:
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view = SystemBindlessView::kSharedMemoryR32G32UintSRV;
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break;
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case 4:
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view = SystemBindlessView::kSharedMemoryR32G32B32A32UintSRV;
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break;
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default:
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assert_unhandled_case(element_size_bytes_pow2);
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view = SystemBindlessView::kSharedMemoryR32UintSRV;
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}
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return GetSystemBindlessViewHandlePair(view);
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}
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ui::d3d12::util::DescriptorCpuGpuHandlePair
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D3D12CommandProcessor::GetSharedMemoryUintPow2BindlessUAVHandlePair(
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uint32_t element_size_bytes_pow2) const {
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SystemBindlessView view;
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switch (element_size_bytes_pow2) {
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case 2:
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view = SystemBindlessView::kSharedMemoryR32UintUAV;
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break;
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case 3:
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view = SystemBindlessView::kSharedMemoryR32G32UintUAV;
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break;
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case 4:
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view = SystemBindlessView::kSharedMemoryR32G32B32A32UintUAV;
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break;
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default:
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assert_unhandled_case(element_size_bytes_pow2);
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view = SystemBindlessView::kSharedMemoryR32UintUAV;
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}
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return GetSystemBindlessViewHandlePair(view);
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}
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ui::d3d12::util::DescriptorCpuGpuHandlePair
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D3D12CommandProcessor::GetEdramUintPow2BindlessSRVHandlePair(
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uint32_t element_size_bytes_pow2) const {
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@@ -1503,46 +1461,10 @@ bool D3D12CommandProcessor::SetupContext() {
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shared_memory_->WriteRawSRVDescriptor(provider.OffsetViewDescriptor(
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view_bindless_heap_cpu_start_,
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uint32_t(SystemBindlessView::kSharedMemoryRawSRV)));
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// kSharedMemoryR32UintSRV.
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shared_memory_->WriteUintPow2SRVDescriptor(
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provider.OffsetViewDescriptor(
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view_bindless_heap_cpu_start_,
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uint32_t(SystemBindlessView::kSharedMemoryR32UintSRV)),
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2);
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// kSharedMemoryR32G32UintSRV.
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shared_memory_->WriteUintPow2SRVDescriptor(
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provider.OffsetViewDescriptor(
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view_bindless_heap_cpu_start_,
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uint32_t(SystemBindlessView::kSharedMemoryR32G32UintSRV)),
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3);
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// kSharedMemoryR32G32B32A32UintSRV.
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shared_memory_->WriteUintPow2SRVDescriptor(
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provider.OffsetViewDescriptor(
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view_bindless_heap_cpu_start_,
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uint32_t(SystemBindlessView::kSharedMemoryR32G32B32A32UintSRV)),
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4);
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// kSharedMemoryRawUAV.
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shared_memory_->WriteRawUAVDescriptor(provider.OffsetViewDescriptor(
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view_bindless_heap_cpu_start_,
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uint32_t(SystemBindlessView::kSharedMemoryRawUAV)));
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// kSharedMemoryR32UintUAV.
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shared_memory_->WriteUintPow2UAVDescriptor(
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provider.OffsetViewDescriptor(
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view_bindless_heap_cpu_start_,
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uint32_t(SystemBindlessView::kSharedMemoryR32UintUAV)),
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2);
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// kSharedMemoryR32G32UintUAV.
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shared_memory_->WriteUintPow2UAVDescriptor(
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provider.OffsetViewDescriptor(
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view_bindless_heap_cpu_start_,
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uint32_t(SystemBindlessView::kSharedMemoryR32G32UintUAV)),
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3);
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// kSharedMemoryR32G32B32A32UintUAV.
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shared_memory_->WriteUintPow2UAVDescriptor(
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provider.OffsetViewDescriptor(
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view_bindless_heap_cpu_start_,
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uint32_t(SystemBindlessView::kSharedMemoryR32G32B32A32UintUAV)),
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4);
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// kEdramRawSRV.
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render_target_cache_->WriteEdramRawSRVDescriptor(
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provider.OffsetViewDescriptor(
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@@ -2646,7 +2568,6 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
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if (host_render_targets_used) {
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bound_depth_and_color_render_target_bits =
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render_target_cache_->GetLastUpdateBoundRenderTargets(
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render_target_cache_->gamma_render_target_as_srgb(),
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bound_depth_and_color_render_target_formats);
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} else {
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bound_depth_and_color_render_target_bits = 0;
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@@ -2979,8 +2900,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
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// Invalidate textures in memexported memory and watch for changes.
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for (const draw_util::MemExportRange& memexport_range : memexport_ranges_) {
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shared_memory_->RangeWrittenByGpu(
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memexport_range.base_address_dwords << 2, memexport_range.size_bytes,
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false);
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memexport_range.base_address_dwords << 2, memexport_range.size_bytes);
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}
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if (GetGPUSetting(GPUSetting::ReadbackMemexport)) {
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// Read the exported data on the CPU.
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@@ -3785,7 +3705,8 @@ XE_NOINLINE void D3D12CommandProcessor::UpdateSystemConstantValues_Impl(
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flags |= uint32_t(alpha_test_function)
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<< DxbcShaderTranslator::kSysFlag_AlphaPassIfLess_Shift;
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// Gamma writing.
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if (!render_target_cache_->gamma_render_target_as_srgb()) {
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if (!(edram_rov_used ||
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render_target_cache_->gamma_render_target_as_unorm16())) {
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for (uint32_t i = 0; i < 4; ++i) {
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if (color_infos[i].color_format ==
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xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA) {
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@@ -3952,9 +3873,7 @@ XE_NOINLINE void D3D12CommandProcessor::UpdateSystemConstantValues_Impl(
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}
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// Texture signedness / gamma.
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bool gamma_render_target_as_srgb =
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render_target_cache_->gamma_render_target_as_srgb();
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uint32_t textures_resolved = 0;
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uint32_t textures_resolution_scaled = 0;
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uint32_t textures_remaining = used_texture_mask;
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uint32_t texture_index;
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while (xe::bit_scan_forward(textures_remaining, &texture_index)) {
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@@ -3974,14 +3893,14 @@ XE_NOINLINE void D3D12CommandProcessor::UpdateSystemConstantValues_Impl(
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texture_signs_uint =
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(texture_signs_uint & ~texture_signs_mask) | texture_signs_shifted;
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// cache misses here, we're accessing the texture bindings out of order
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textures_resolved |=
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uint32_t(texture_cache_->IsActiveTextureResolved(texture_index))
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textures_resolution_scaled |=
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uint32_t(texture_cache_->IsActiveTextureResolutionScaled(texture_index))
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<< texture_index;
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}
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update_dirty_uint32_cmp(system_constants_.textures_resolved,
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textures_resolved);
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system_constants_.textures_resolved = textures_resolved;
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update_dirty_uint32_cmp(system_constants_.textures_resolution_scaled,
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textures_resolution_scaled);
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system_constants_.textures_resolution_scaled = textures_resolution_scaled;
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// Log2 of sample count, for alpha to mask and with ROV, for EDRAM address
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// calculation with MSAA.
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