Merge remote-tracking branch 'xenia-master/master' into canary_experimental
This commit is contained in:
@@ -71,76 +71,41 @@ namespace gpu {
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const TextureCache::LoadShaderInfo
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TextureCache::load_shader_info_[kLoadShaderCount] = {
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// k8bpb
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{3, 4, 1, 4},
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// k16bpb
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{4, 4, 2, 4},
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// k32bpb
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{4, 4, 4, 3},
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// k64bpb
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{4, 4, 8, 2},
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// k128bpb
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{4, 4, 16, 1},
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// kR5G5B5A1ToB5G5R5A1
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{4, 4, 2, 4},
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// kR5G6B5ToB5G6R5
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{4, 4, 2, 4},
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// kR5G5B6ToB5G6R5WithRBGASwizzle
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{4, 4, 2, 4},
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// kRGBA4ToBGRA4
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{4, 4, 2, 4},
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// kRGBA4ToARGB4
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{4, 4, 2, 4},
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// kGBGR8ToGRGB8
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{4, 4, 4, 3},
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// kGBGR8ToRGB8
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{4, 4, 8, 3},
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// kBGRG8ToRGBG8
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{4, 4, 4, 3},
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// kBGRG8ToRGB8
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{4, 4, 8, 3},
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// kR10G11B11ToRGBA16
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{4, 4, 8, 3},
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// kR10G11B11ToRGBA16SNorm
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{4, 4, 8, 3},
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// kR11G11B10ToRGBA16
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{4, 4, 8, 3},
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// kR11G11B10ToRGBA16SNorm
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{4, 4, 8, 3},
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// kR16UNormToFloat
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{4, 4, 2, 4},
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// kR16SNormToFloat
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{4, 4, 2, 4},
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// kRG16UNormToFloat
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{4, 4, 4, 3},
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// kRG16SNormToFloat
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{4, 4, 4, 3},
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// kRGBA16UNormToFloat
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{4, 4, 8, 2},
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// kRGBA16SNormToFloat
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{4, 4, 8, 2},
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// kDXT1ToRGBA8
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{4, 4, 4, 2},
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// kDXT3ToRGBA8
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{4, 4, 4, 1},
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// kDXT5ToRGBA8
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{4, 4, 4, 1},
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// kDXNToRG8
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{4, 4, 2, 1},
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// kDXT3A
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{4, 4, 1, 2},
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// kDXT3AAs1111ToBGRA4
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{4, 4, 2, 2},
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// kDXT3AAs1111ToARGB4
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{4, 4, 2, 2},
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// kDXT5AToR8
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{4, 4, 1, 2},
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// kCTX1
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{4, 4, 2, 2},
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// kDepthUnorm
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{4, 4, 4, 3},
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// kDepthFloat
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{4, 4, 4, 3},
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{1, 4}, // k8bpb
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{2, 4}, // k16bpb
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{4, 3}, // k32bpb
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{8, 2}, // k64bpb
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{16, 1}, // k128bpb
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{2, 4}, // kR5G5B5A1ToB5G5R5A1
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{2, 4}, // kR5G6B5ToB5G6R5
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{2, 4}, // kR5G5B6ToB5G6R5WithRBGASwizzle
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{2, 4}, // kRGBA4ToBGRA4
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{2, 4}, // kRGBA4ToARGB4
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{4, 3}, // kGBGR8ToGRGB8
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{8, 3}, // kGBGR8ToRGB8
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{4, 3}, // kBGRG8ToRGBG8
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{8, 3}, // kBGRG8ToRGB8
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{8, 3}, // kR10G11B11ToRGBA16
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{8, 3}, // kR10G11B11ToRGBA16SNorm
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{8, 3}, // kR11G11B10ToRGBA16
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{8, 3}, // kR11G11B10ToRGBA16SNorm
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{2, 4}, // kR16UNormToFloat
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{2, 4}, // kR16SNormToFloat
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{4, 3}, // kRG16UNormToFloat
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{4, 3}, // kRG16SNormToFloat
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{8, 2}, // kRGBA16UNormToFloat
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{8, 2}, // kRGBA16SNormToFloat
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{4, 2}, // kDXT1ToRGBA8
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{4, 1}, // kDXT3ToRGBA8
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{4, 1}, // kDXT5ToRGBA8
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{2, 1}, // kDXNToRG8
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{1, 2}, // kDXT3A
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{2, 2}, // kDXT3AAs1111ToBGRA4
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{2, 2}, // kDXT3AAs1111ToARGB4
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{1, 2}, // kDXT5AToR8
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{2, 2}, // kCTX1
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{4, 3}, // kDepthUnorm
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{4, 3}, // kDepthFloat
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};
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TextureCache::TextureCache(const RegisterFile& register_file,
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@@ -329,7 +294,7 @@ void TextureCache::MarkRangeAsResolved(uint32_t start_unscaled,
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// Invalidate textures. Toggling individual textures between scaled and
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// unscaled also relies on invalidation through shared memory.
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shared_memory().RangeWrittenByGpu(start_unscaled, length_unscaled, true);
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shared_memory().RangeWrittenByGpu(start_unscaled, length_unscaled);
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}
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uint32_t TextureCache::GuestToHostSwizzle(uint32_t guest_swizzle,
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@@ -508,8 +473,6 @@ TextureCache::Texture::Texture(TextureCache& texture_cache,
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: texture_cache_(texture_cache),
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key_(key),
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guest_layout_(key.GetGuestLayout()),
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base_resolved_(key.scaled_resolve),
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mips_resolved_(key.scaled_resolve),
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last_usage_submission_index_(texture_cache.current_submission_index_),
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last_usage_time_(texture_cache.current_submission_time_),
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used_previous_(track_usage ? texture_cache.texture_used_last_ : nullptr),
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@@ -767,21 +730,17 @@ void TextureCache::LoadTexturesData(Texture** textures, uint32_t n_textures) {
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// portion of its pages is invalidated, in this case we'll need the texture
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// from the shared memory to load the unscaled parts.
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// TODO(Triang3l): Load unscaled parts.
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bool base_resolved = texture.GetBaseResolved();
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if (index_base_outdated & (1ULL << i)) {
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if (!shared_memory().RequestRange(
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texture_key.base_page << 12,
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xe::align(texture.GetGuestBaseSize(), UINT32_C(16)),
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texture_key.scaled_resolve ? nullptr : &base_resolved)) {
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xe::align(texture.GetGuestBaseSize(), UINT32_C(16)))) {
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continue;
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}
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}
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bool mips_resolved = texture.GetMipsResolved();
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if (index_mips_outdated & (1ULL << i)) {
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if (!shared_memory().RequestRange(
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texture_key.mip_page << 12,
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xe::align(texture.GetGuestMipsSize(), UINT32_C(16)),
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texture_key.scaled_resolve ? nullptr : &mips_resolved)) {
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xe::align(texture.GetGuestMipsSize(), UINT32_C(16)))) {
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continue;
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}
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}
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@@ -807,13 +766,6 @@ void TextureCache::LoadTexturesData(Texture** textures, uint32_t n_textures) {
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continue;
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}
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// Update the source of the texture (resolve vs. CPU or memexport) for
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// purposes of handling piecewise gamma emulation via sRGB and for
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// resolution scale in sampling offsets.
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if (!texture_key.scaled_resolve) {
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texture.SetBaseResolved(base_resolved);
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texture.SetMipsResolved(mips_resolved);
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}
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// reque for makeuptodatandwatch
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textures[i] = &texture;
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}
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@@ -870,21 +822,17 @@ bool TextureCache::LoadTextureData(Texture& texture) {
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// its pages is invalidated, in this case we'll need the texture from the
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// shared memory to load the unscaled parts.
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// TODO(Triang3l): Load unscaled parts.
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bool base_resolved = texture.GetBaseResolved();
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if (base_outdated) {
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if (!shared_memory().RequestRange(
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texture_key.base_page << 12,
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xe::align(texture.GetGuestBaseSize(), UINT32_C(16)),
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texture_key.scaled_resolve ? nullptr : &base_resolved)) {
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xe::align(texture.GetGuestBaseSize(), UINT32_C(16)))) {
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return false;
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}
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}
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bool mips_resolved = texture.GetMipsResolved();
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if (mips_outdated) {
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if (!shared_memory().RequestRange(
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texture_key.mip_page << 12,
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xe::align(texture.GetGuestMipsSize(), UINT32_C(16)),
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texture_key.scaled_resolve ? nullptr : &mips_resolved)) {
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xe::align(texture.GetGuestMipsSize(), UINT32_C(16)))) {
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return false;
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}
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}
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@@ -909,14 +857,6 @@ bool TextureCache::LoadTextureData(Texture& texture) {
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return false;
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}
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// Update the source of the texture (resolve vs. CPU or memexport) for
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// purposes of handling piecewise gamma emulation via sRGB and for resolution
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// scale in sampling offsets.
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if (!texture_key.scaled_resolve) {
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texture.SetBaseResolved(base_resolved);
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texture.SetMipsResolved(mips_resolved);
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}
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// Mark the ranges as uploaded and watch them. This is needed for scaled
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// resolves as well to detect when the CPU wants to reuse the memory for a
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// regular texture or a vertex buffer, and thus the scaled resolve version is
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