[D3D12] Cleanup: pipeline state -> pipeline, other things
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@@ -237,14 +237,13 @@ class D3D12CommandProcessor;
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// get each of the 4 host pixels for each sample.
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class RenderTargetCache {
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public:
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// Direct3D 12 debug layer does some kaschenit-style trolling by giving errors
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// that contradict each other when you use null RTV descriptors - if you set
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// a valid format in RTVFormats in the pipeline state, it says that null
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// descriptors can only be used if the format in the pipeline state is
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// DXGI_FORMAT_UNKNOWN, however, if DXGI_FORMAT_UNKNOWN is set, it complains
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// that the format in the pipeline doesn't match the RTV format. So we have to
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// make render target bindings consecutive and remap the output indices in
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// pixel shaders.
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// Direct3D 12 debug layer is giving errors that contradict each other when
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// you use null RTV descriptors - if you set a valid format in RTVFormats in
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// the pipeline state, it says that null descriptors can only be used if the
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// format in the pipeline state is DXGI_FORMAT_UNKNOWN, however, if
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// DXGI_FORMAT_UNKNOWN is set, it complains that the format in the pipeline
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// state doesn't match the RTV format. So we have to make render target
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// bindings consecutive and remap the output indices in pixel shaders.
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struct PipelineRenderTarget {
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uint32_t guest_render_target;
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DXGI_FORMAT format;
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@@ -537,7 +536,7 @@ class RenderTargetCache {
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// 16: - EDRAM pitch in tiles.
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uint32_t base_samples_2x_depth_pitch;
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};
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// EDRAM pipeline states for the RTV/DSV path.
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// EDRAM pipelines for the RTV/DSV path.
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static const EdramLoadStoreModeInfo
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edram_load_store_mode_info_[size_t(EdramLoadStoreMode::kCount)];
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ID3D12PipelineState*
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@@ -546,20 +545,20 @@ class RenderTargetCache {
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ID3D12PipelineState*
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edram_store_pipelines_[size_t(EdramLoadStoreMode::kCount)] = {};
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// Resolve root signatures and pipeline state objects.
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// Resolve root signatures and pipelines.
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ID3D12RootSignature* resolve_copy_root_signature_ = nullptr;
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static const std::pair<const uint8_t*, size_t>
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resolve_copy_shaders_[size_t(draw_util::ResolveCopyShaderIndex::kCount)];
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ID3D12PipelineState* resolve_copy_pipeline_states_[size_t(
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ID3D12PipelineState* resolve_copy_pipelines_[size_t(
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draw_util::ResolveCopyShaderIndex::kCount)] = {};
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ID3D12RootSignature* resolve_clear_root_signature_ = nullptr;
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// Clearing 32bpp color, depth with ROV, or unorm depth without ROV.
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ID3D12PipelineState* resolve_clear_32bpp_pipeline_state_ = nullptr;
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ID3D12PipelineState* resolve_clear_32bpp_pipeline_ = nullptr;
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// Clearing 64bpp color.
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ID3D12PipelineState* resolve_clear_64bpp_pipeline_state_ = nullptr;
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ID3D12PipelineState* resolve_clear_64bpp_pipeline_ = nullptr;
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// Clearing float depth without ROV, both the float24 and the host float32
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// versions.
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ID3D12PipelineState* resolve_clear_depth_24_32_pipeline_state_ = nullptr;
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ID3D12PipelineState* resolve_clear_depth_24_32_pipeline_ = nullptr;
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// FIXME(Triang3l): Investigate what's wrong with placed RTV/DSV aliasing on
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// Nvidia Maxwell 1st generation and older.
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