[D3D12] 8/16bpp resolves, fixed16 RT exp bias, RT format documentation

This commit is contained in:
Triang3l
2018-09-26 16:06:43 +03:00
parent 6e36101b42
commit 70103804c3
72 changed files with 3261 additions and 1538 deletions

View File

@@ -81,7 +81,9 @@ class TextureCache {
AnisoFilter aniso_filter,
D3D12_CPU_DESCRIPTOR_HANDLE handle);
static DXGI_FORMAT GetResolveDXGIFormat(TextureFormat format);
static inline DXGI_FORMAT GetResolveDXGIFormat(TextureFormat format) {
return host_formats_[uint32_t(format)].dxgi_format_resolve_tile;
}
// The source buffer must be in the non-pixel-shader SRV state.
bool TileResolvedTexture(TextureFormat format, uint32_t texture_base,
uint32_t texture_pitch, uint32_t texture_height,
@@ -121,31 +123,45 @@ class TextureCache {
// Tiling modes for storing textures after resolving - needed only for the
// formats that can be resolved to.
enum class TileMode {
enum class ResolveTileMode {
k8bpp,
k16bpp,
k32bpp,
k64bpp,
// B5G5R5A1 and B4G4R4A4 are optional in DXGI for render targets, and aren't
// supported on Nvidia.
k16bppRGBA,
kCount,
kUnknown = kCount
};
struct TileModeInfo {
struct ResolveTileModeInfo {
const void* shader;
size_t shader_size;
// DXGI_FORMAT_UNKNOWN for ByteAddressBuffer (usable only for textures with
// texels that are 32-bit or larger).
DXGI_FORMAT typed_uav_format;
// For typed UAVs, log2 of the number of bytes in each UAV texel.
uint32_t uav_texel_size_log2;
};
struct HostFormat {
// Format info for the regular case.
DXGI_FORMAT dxgi_format;
LoadMode load_mode;
TileMode tile_mode;
// Uncompression info for when the regular host format for this texture is
// block-compressed, but the size is not block-aligned, and thus such
// texture cannot be created in Direct3D on PC and needs decompression,
// however, such textures are common, for instance, in Halo 3.
DXGI_FORMAT dxgi_format_uncompressed;
LoadMode decompress_mode;
// For writing textures after resolving render targets. The format itself
// must be renderable, because resolving is done by drawing a quad into a
// texture of this format.
DXGI_FORMAT dxgi_format_resolve_tile;
ResolveTileMode resolve_tile_mode;
};
union TextureKey {
@@ -258,17 +274,20 @@ class TextureCache {
// vec4 3.
// Offset within the packed mip for small mips.
uint32_t guest_mip_offset[3];
uint32_t guest_format;
static constexpr uint32_t kGuestPitchTiled = UINT32_MAX;
};
struct TileConstants {
struct ResolveTileConstants {
// Either from the start of the shared memory or from the start of the typed
// UAV, in bytes.
// UAV, in bytes (even for typed UAVs, so XeTextureTiledOffset2D is easier
// to use).
uint32_t guest_base;
// 0:2 - endianness (up to Xin128).
// 3:31 - actual guest texture width.
uint32_t endian_guest_pitch;
// 3:8 - guest format (primarily for 16-bit textures).
// 9:31 - actual guest texture width.
uint32_t endian_format_guest_pitch;
// Size to copy, texels with index bigger than this won't be written.
// Width in the lower 16 bits, height in the upper.
uint32_t size;
@@ -337,9 +356,10 @@ class TextureCache {
static const LoadModeInfo load_mode_info_[];
ID3D12RootSignature* load_root_signature_ = nullptr;
ID3D12PipelineState* load_pipelines_[size_t(LoadMode::kCount)] = {};
static const TileModeInfo tile_mode_info_[];
ID3D12RootSignature* tile_root_signature_ = nullptr;
ID3D12PipelineState* tile_pipelines_[size_t(TileMode::kCount)] = {};
static const ResolveTileModeInfo resolve_tile_mode_info_[];
ID3D12RootSignature* resolve_tile_root_signature_ = nullptr;
ID3D12PipelineState*
resolve_tile_pipelines_[size_t(ResolveTileMode::kCount)] = {};
std::unordered_multimap<uint64_t, Texture*> textures_;