Adding VECTOR_SUB for vsub*.

src/alloy/hir/hir_builder.cc

@@ -1299,6 +1299,23 @@ Value* HIRBuilder::Sub(Value* value1, Value* value2,
   return i->dest;
 }
 
+Value* HIRBuilder::VectorSub(Value* value1, Value* value2, TypeName part_type,
+                             uint32_t arithmetic_flags) {
+  ASSERT_VECTOR_TYPE(value1);
+  ASSERT_VECTOR_TYPE(value2);
+
+  // This is shady.
+  uint32_t flags = part_type | (arithmetic_flags << 8);
+  assert_zero(flags >> 16);
+
+  Instr* i = AppendInstr(OPCODE_VECTOR_SUB_info, (uint16_t)flags,
+                         AllocValue(value1->type));
+  i->set_src1(value1);
+  i->set_src2(value2);
+  i->src3.value = NULL;
+  return i->dest;
+}
+
 Value* HIRBuilder::Mul(Value* value1, Value* value2,
                        uint32_t arithmetic_flags) {
   ASSERT_TYPES_EQUAL(value1, value2);

src/alloy/hir/hir_builder.h

@@ -169,6 +169,8 @@ class HIRBuilder {
   Value* VectorAdd(Value* value1, Value* value2, TypeName part_type,
                    uint32_t arithmetic_flags = 0);
   Value* Sub(Value* value1, Value* value2, uint32_t arithmetic_flags = 0);
+  Value* VectorSub(Value* value1, Value* value2, TypeName part_type,
+                   uint32_t arithmetic_flags = 0);
   Value* Mul(Value* value1, Value* value2, uint32_t arithmetic_flags = 0);
   Value* MulHi(Value* value1, Value* value2, uint32_t arithmetic_flags = 0);
   Value* Div(Value* value1, Value* value2, uint32_t arithmetic_flags = 0);

src/alloy/hir/opcodes.h

@@ -140,6 +140,7 @@ enum Opcode {
   OPCODE_ADD_CARRY,
   OPCODE_VECTOR_ADD,
   OPCODE_SUB,
+  OPCODE_VECTOR_SUB,
   OPCODE_MUL,
   OPCODE_MUL_HI,  // TODO(benvanik): remove this and add INT128 type.
   OPCODE_DIV,

src/alloy/hir/opcodes.inl

@@ -389,6 +389,12 @@ DEFINE_OPCODE(
     OPCODE_SIG_V_V_V,
     0)
 
+DEFINE_OPCODE(
+    OPCODE_VECTOR_SUB,
+    "vector_sub",
+    OPCODE_SIG_V_V_V,
+    0)
+
 DEFINE_OPCODE(
     OPCODE_MUL,
     "mul",