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[D3D12] RB_STENCILREFMASK_BF and stencil constants cleanup

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Triang3l
2019-07-14 23:49:30 +03:00
parent f393c621d7
commit 7a88789ebd
25 changed files with 2098 additions and 2331 deletions
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24
src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.txt
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@@ -21,26 +21,22 @@
// float2 xe_point_screen_to_ndc; // Offset: 160 Size: 8 [unused]
// uint2 xe_sample_count_log2; // Offset: 168 Size: 8 [unused]
// float xe_alpha_test_reference; // Offset: 176 Size: 4 [unused]
// uint xe_edram_pitch_tiles; // Offset: 180 Size: 4 [unused]
// uint xe_edram_depth_base_dwords; // Offset: 184 Size: 4 [unused]
// uint xe_edram_resolution_square_scale;// Offset: 180 Size: 4 [unused]
// uint xe_edram_pitch_tiles; // Offset: 184 Size: 4 [unused]
// uint xe_edram_depth_base_dwords; // Offset: 188 Size: 4 [unused]
// float4 xe_color_exp_bias; // Offset: 192 Size: 16 [unused]
// uint4 xe_color_output_map; // Offset: 208 Size: 16 [unused]
// float2 xe_tessellation_factor_range;// Offset: 224 Size: 8
// float2 xe_edram_depth_range; // Offset: 232 Size: 8 [unused]
// float2 xe_edram_poly_offset_front; // Offset: 240 Size: 8 [unused]
// float2 xe_edram_poly_offset_back; // Offset: 248 Size: 8 [unused]
// uint xe_edram_resolution_square_scale;// Offset: 256 Size: 4 [unused]
// uint xe_edram_stencil_reference; // Offset: 260 Size: 4 [unused]
// uint xe_edram_stencil_read_mask; // Offset: 264 Size: 4 [unused]
// uint xe_edram_stencil_write_mask; // Offset: 268 Size: 4 [unused]
// uint4 xe_edram_stencil_front; // Offset: 272 Size: 16 [unused]
// uint4 xe_edram_stencil_back; // Offset: 288 Size: 16 [unused]
// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 304 Size: 16 [unused]
// uint4 xe_edram_rt_format_flags; // Offset: 320 Size: 16 [unused]
// float4 xe_edram_rt_clamp[4]; // Offset: 336 Size: 64 [unused]
// uint4 xe_edram_rt_keep_mask[2]; // Offset: 400 Size: 32 [unused]
// uint4 xe_edram_rt_blend_factors_ops;// Offset: 432 Size: 16 [unused]
// float4 xe_edram_blend_constant; // Offset: 448 Size: 16 [unused]
// uint4 xe_edram_stencil[2]; // Offset: 256 Size: 32 [unused]
// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 288 Size: 16 [unused]
// uint4 xe_edram_rt_format_flags; // Offset: 304 Size: 16 [unused]
// float4 xe_edram_rt_clamp[4]; // Offset: 320 Size: 64 [unused]
// uint4 xe_edram_rt_keep_mask[2]; // Offset: 384 Size: 32 [unused]
// uint4 xe_edram_rt_blend_factors_ops;// Offset: 416 Size: 16 [unused]
// float4 xe_edram_blend_constant; // Offset: 432 Size: 16 [unused]
//
// }
//