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stvl/stvr tests; failing right now!

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This commit is contained in:
Ben Vanik
2014-10-26 00:48:48 -07:00
parent d8a1c5ce79
commit 8098d55ebd
9 changed files with 69 additions and 0 deletions
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src/alloy/frontend/ppc/test/bin/instr_stvl.bin Normal file
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src/alloy/frontend/ppc/test/bin/instr_stvl.dis Normal file
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@@ -0,0 +1,9 @@
/vagrant/src/alloy/frontend/ppc/test/bin//instr_stvl.o: file format elf64-powerpc
Disassembly of section .text:
0000000000100000 <test_stvl_1>:
100000: 7c 64 05 0e stvlx v3,r4,r0
100004: 4e 80 00 20 blr

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src/alloy/frontend/ppc/test/bin/instr_stvl.map Normal file
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@@ -0,0 +1 @@
0000000000000000 t test_stvl_1

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src/alloy/frontend/ppc/test/bin/instr_stvr.bin Normal file
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src/alloy/frontend/ppc/test/bin/instr_stvr.dis Normal file
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/vagrant/src/alloy/frontend/ppc/test/bin//instr_stvr.o: file format elf64-powerpc
Disassembly of section .text:
0000000000100000 <test_stvr_1>:
100000: 7c 64 2d 4e stvrx v3,r4,r5
100004: 4e 80 00 20 blr

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src/alloy/frontend/ppc/test/bin/instr_stvr.map Normal file
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@@ -0,0 +1 @@
0000000000000000 t test_stvr_1