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[CPU] Set VSCR NJ (non-Java) bit

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Herman S.
2025-10-19 13:38:54 +09:00
parent 11815400cd
commit 83ff0c501b
1 changed files with 3 additions and 1 deletions
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4
src/xenia/cpu/thread_state.cc
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@@ -93,7 +93,9 @@ ThreadState::ThreadState(Processor* processor, uint32_t thread_id,
// Set initial registers. // Set initial registers.
context_->r[1] = stack_base; context_->r[1] = stack_base;
context_->r[13] = pcr_address; context_->r[13] = pcr_address;
// fixme: VSCR must be set here! // VSCR - Vector Status and Control Register
// NJ bit (bit 16) = 1: Non-Java IEEE mode (default for Xbox 360)
context_->vscr_vec = vec128i(0, 0, 0, 0x00010000);
context_->msr = 0x9030; // dumped from a real 360, 0x8000 context_->msr = 0x9030; // dumped from a real 360, 0x8000
// this register can be used for arbitrary data according to the PPC docs // this register can be used for arbitrary data according to the PPC docs