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add writeback base/size and xps base/size registers, EVENT_WRITE_SHD check

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disjtqz
2023-09-18 17:10:34 -04:00
committed by Radosław Gliński
parent 3876a1632a
commit 911055c44f
2 changed files with 19 additions and 5 deletions
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12
src/xenia/gpu/register_table.inc
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@@ -72,10 +72,14 @@ XE_GPU_REGISTER(0x0855, kDword, MC1_PERFCOUNTER0_SELECT)
XE_GPU_REGISTER(0x0856, kDword, MC1_PERFCOUNTER0_HI)
XE_GPU_REGISTER(0x0857, kDword, MC1_PERFCOUNTER0_LOW)
XE_GPU_REGISTER(0x0A02, kDword, UNKNOWN_0A02)
XE_GPU_REGISTER(0x0A03, kDword, UNKNOWN_0A03)
XE_GPU_REGISTER(0x0A04, kDword, UNKNOWN_0A04)
XE_GPU_REGISTER(0x0A05, kDword, UNKNOWN_0A05)
//base GPU virtual address of the xps region. Most guests write 0xC0100000 here
XE_GPU_REGISTER(0x0A02, kDword, XPS_BASE)
//will usually be set higher, but is effectively 0x700000 bytes long
XE_GPU_REGISTER(0x0A03, kDword, XPS_SIZE)
//usually 0xC0000000
XE_GPU_REGISTER(0x0A04, kDword, WRITEBACK_BASE)
//usually 0x0100000
XE_GPU_REGISTER(0x0A05, kDword, WRITEBACK_SIZE)
XE_GPU_REGISTER(0x0A18, kDword, MH_PERFCOUNTER0_SELECT)
XE_GPU_REGISTER(0x0A19, kDword, MH_PERFCOUNTER0_HI)