From 91a43a0ab6cf263661ca4c006cc17171b95b0fb1 Mon Sep 17 00:00:00 2001
From: Ben Vanik <ben.vanik@gmail.com>
Date: Sat, 1 Feb 2014 01:13:05 -0800
Subject: [PATCH] Fixing broken temp reg.

---
 src/alloy/backend/x64/lowering/op_utils.inl | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/alloy/backend/x64/lowering/op_utils.inl b/src/alloy/backend/x64/lowering/op_utils.inl
index afc075ce9..ef0be4ab1 100644
--- a/src/alloy/backend/x64/lowering/op_utils.inl
+++ b/src/alloy/backend/x64/lowering/op_utils.inl
@@ -744,12 +744,12 @@ void IntTernaryOpVCV(X64Emitter& e, Instr*& i, vvv_fn vvv_fn, vcv_fn vcv_fn,
         // Eww.
         e.mov(TEMP_REG, src1);
         e.mov(src1, src3);
-        e.mov(dest, e.rax);
+        e.mov(dest, TEMP_REG);
         e.mov(TEMP_REG, src2->constant.i64);
         vvv_fn(e, *i, dest, TEMP_REG, src1);
       }
     } else {
-      e.mov(e.rax, src2->constant.i64);
+      e.mov(TEMP_REG, src2->constant.i64);
       e.mov(dest, src1);
       vvv_fn(e, *i, dest, TEMP_REG, src3);
     }