Fixing some particularly bad /W4.
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@@ -40,7 +40,7 @@ namespace frontend {
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// 100: invalid
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// 128-256: VR
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#pragma pack(push, 4)
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#pragma pack(push, 8)
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typedef struct alignas(64) PPCContext_s {
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// Must be stored at 0x0 for now.
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// TODO(benvanik): find a nice way to describe this to the JIT.
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@@ -49,9 +49,11 @@ typedef struct alignas(64) PPCContext_s {
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uint8_t* virtual_membase;
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// Most frequently used registers first.
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uint64_t r[32]; // General purpose registers
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uint64_t lr; // Link register
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uint64_t ctr; // Count register
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uint64_t lr; // Link register
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uint64_t ctr; // Count register
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uint64_t r[32]; // General purpose registers
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double f[32]; // Floating-point registers
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vec128_t v[128]; // VMX128 vector registers
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// XER register
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// Split to make it easier to do individual updates.
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@@ -188,9 +190,6 @@ typedef struct alignas(64) PPCContext_s {
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uint8_t vscr_sat;
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double f[32]; // Floating-point registers
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vec128_t v[128]; // VMX128 vector registers
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// uint32_t get_fprf() {
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// return fpscr.value & 0x000F8000;
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// }
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@@ -216,11 +215,15 @@ typedef struct alignas(64) PPCContext_s {
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uint8_t* physical_membase;
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// Keep the struct padded out to 64b total.
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uint8_t _padding[8];
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void SetRegFromString(const char* name, const char* value);
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bool CompareRegWithString(const char* name, const char* value,
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char* out_value, size_t out_value_size);
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} PPCContext;
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#pragma pack(pop)
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static_assert(sizeof(PPCContext) % 64 == 0, "64b padded");
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} // namespace frontend
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} // namespace cpu
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