Generating a lot of code!

Still a few missing instructions/variants and other issues, but a big and
valid LLVM module is being generated.
This commit is contained in:
Ben Vanik
2013-01-22 00:22:27 -08:00
parent 791f14182c
commit 91f9e8b7bb
18 changed files with 1613 additions and 423 deletions

View File

@@ -104,6 +104,14 @@ typedef struct {
uint32_t OPCD : 6;
} DS;
// kXEPPCInstrFormatX
struct {
uint32_t Rc : 1;
uint32_t : 10;
uint32_t B : 5;
uint32_t A : 5;
uint32_t D : 5;
uint32_t OPCD : 6;
} X;
// kXEPPCInstrFormatXL
struct {
uint32_t LK : 1;
@@ -123,6 +131,15 @@ typedef struct {
// kXEPPCInstrFormatXFL
// kXEPPCInstrFormatXS
// kXEPPCInstrFormatXO
struct {
uint32_t Rc : 1;
uint32_t : 8;
uint32_t OE : 1;
uint32_t B : 5;
uint32_t A : 5;
uint32_t D : 5;
uint32_t OPCD : 6;
} XO;
// kXEPPCInstrFormatA
// kXEPPCInstrFormatM
// kXEPPCInstrFormatMD

View File

@@ -19,6 +19,12 @@
#include <stdint.h>
#ifdef XE_THUNK
#define XECACHEALIGN __attribute__ ((aligned(8)))
#define XECACHEALIGN64 __attribute__ ((aligned(64)))
#endif
// namespace FPRF {
// enum FPRF_e {
// QUIET_NAN = 0x00088000,
@@ -34,7 +40,7 @@
// } // FPRF
typedef struct XECACHEALIGN {
typedef struct XECACHEALIGN xe_float4 {
union {
struct {
float x;
@@ -51,17 +57,17 @@ typedef struct XECACHEALIGN {
} xe_float4_t;
typedef struct XECACHEALIGN64 {
uint64_t r[32]; // General purpose registers
xe_float4_t v[128]; // VMX128 vector registers
double f[32]; // Floating-point registers
typedef struct XECACHEALIGN64 xe_ppc_state {
uint32_t cia; // Current PC (CIA)
uint32_t nia; // Next PC (NIA)
uint64_t xer; // XER register
uint64_t lr; // Link register
uint64_t ctr; // Count register
uint64_t r[32]; // General purpose registers
xe_float4_t v[128]; // VMX128 vector registers
double f[32]; // Floating-point registers
union {
uint32_t value;
struct {
@@ -76,6 +82,12 @@ typedef struct XECACHEALIGN64 {
uint8_t vx :1; // FP invalid operation exception summary - copy of FPSCR[VX]
uint8_t ox :1; // FP overflow exception - copy of FPSCR[OX]
} cr1;
uint8_t cr2 :4;
uint8_t cr3 :4;
uint8_t cr4 :4;
uint8_t cr5 :4;
uint8_t cr6 :4;
uint8_t cr7 :4;
} cr; // Condition register
union {