Moving LoadAcquire/StoreRelease behavior up into HIR.
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@@ -185,6 +185,9 @@ typedef struct XECACHEALIGN64 PPCContext_s {
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// fpscr.value = (fpscr.value & ~0x000F8000) | v;
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// }
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// Reserve address for load acquire/store release. Shared.
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uint32_t* reserve_address;
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// Runtime-specific data pointer. Used on callbacks to get access to the
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// current runtime and its data.
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uint8_t* membase;
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@@ -141,6 +141,8 @@ int PPCHIRBuilder::Emit(FunctionInfo* symbol_info) {
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// splits blocks we don't have weird pointers.
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if (prev_instr && prev_instr->next) {
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instr_offset_list_[offset] = prev_instr->next;
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} else if (prev_instr) {
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instr_offset_list_[offset] = prev_instr->block->next->instr_head;
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} else if (current_block_) {
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instr_offset_list_[offset] = current_block_->instr_head;
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} else if (block_tail_) {
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@@ -326,3 +328,24 @@ void PPCHIRBuilder::StoreVR(uint32_t reg, Value* value) {
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StoreContext(
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offsetof(PPCContext, v) + reg * 16, value);
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}
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Value* PPCHIRBuilder::LoadAcquire(
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Value* address, TypeName type, uint32_t load_flags) {
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AtomicExchange(
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LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE),
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Truncate(address, INT32_TYPE));
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return Load(address, type, load_flags);
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}
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Value* PPCHIRBuilder::StoreRelease(
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Value* address, Value* value, uint32_t store_flags) {
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Value* old_address = AtomicExchange(
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LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE),
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LoadZero(INT32_TYPE));
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Value* eq = CompareEQ(Truncate(address, INT32_TYPE), old_address);
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auto skip_label = NewLabel();
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BranchFalse(eq, skip_label, BRANCH_UNLIKELY);
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Store(address, value, store_flags);
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MarkLabel(skip_label);
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return eq;
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}
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@@ -63,6 +63,9 @@ public:
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Value* LoadVR(uint32_t reg);
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void StoreVR(uint32_t reg, Value* value);
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Value* LoadAcquire(Value* address, hir::TypeName type, uint32_t load_flags = 0);
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Value* StoreRelease(Value* address, Value* value, uint32_t store_flags = 0);
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private:
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void AnnotateLabel(uint64_t address, Label* label);
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