fabi/Xenia-Canary
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Add separate VMX/fpu mxcsr

Browse Source 
Add support for constant operands for most fpu instructions
Remove constant folding for most fpu cpde
half float
This commit is contained in:
chss95cs@gmail.com
2022-07-31 08:56:36 -07:00
parent 3185b0ac9c
commit 968f656d96
18 changed files with 687 additions and 611 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
src/xenia/cpu/ppc/ppc_emit_fpu.cc
View File

@@ -382,7 +382,6 @@ int InstrEmit_mtfsfx(PPCHIRBuilder& f, const InstrData& i) {
return 1;
} else {
assert_zero(i.XFL.W);
// Store under control of mask.
// Expand the mask from 8 bits -> 32 bits.
uint32_t mask = 0;
@@ -402,7 +401,7 @@ int InstrEmit_mtfsfx(PPCHIRBuilder& f, const InstrData& i) {
// Update the system rounding mode.
if (mask & 0x7) {
f.SetRoundingMode(v);
f.SetRoundingMode(f.And(v, f.LoadConstantInt32(7)));
}
}
if (i.XFL.Rc) {
@@ -425,7 +424,7 @@ int InstrEmit_mtfsfix(PPCHIRBuilder& f, const InstrData& i) {
// Update the system rounding mode.
if (mask & 0x7) {
f.SetRoundingMode(fpscr);
f.SetRoundingMode(f.And(fpscr, f.LoadConstantInt32(7)));
}
if (i.X.Rc) {