fabi/Xenia-Canary
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Constant tests for srw, stvew, stvl, stvr, subf, subfc, subfe, subfic, subfme, subfze.

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gibbed
2015-05-13 06:38:31 -05:00
parent 0cf3e8c3f5
commit 9714018fbb
10 changed files with 570 additions and 0 deletions
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94
src/xenia/cpu/frontend/test/instr_subfme.s
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@@ -10,6 +10,19 @@ test_subfme_one_ca_1:
#_ REGISTER_OUT r3 0xfffffffffffefc40
#_ REGISTER_OUT r4 1
test_subfme_one_ca_1_constant:
lis r10, 1
ori r10, r10, 0x03BF
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0x00000000000103BF
#_ REGISTER_OUT r3 0xfffffffffffefc40
#_ REGISTER_OUT r4 1
test_subfme_one_ca_2:
#_ REGISTER_IN r10 0
xor r3, r3, r3
@@ -22,6 +35,18 @@ test_subfme_one_ca_2:
#_ REGISTER_OUT r3 -1
#_ REGISTER_OUT r4 1
test_subfme_one_ca_2_constant:
li r10, 0
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0
#_ REGISTER_OUT r3 -1
#_ REGISTER_OUT r4 1
test_subfme_one_ca_3:
#_ REGISTER_IN r10 1
xor r3, r3, r3
@@ -34,6 +59,18 @@ test_subfme_one_ca_3:
#_ REGISTER_OUT r3 0xfffffffffffffffe
#_ REGISTER_OUT r4 1
test_subfme_one_ca_3_constant:
li r10, 1
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 1
#_ REGISTER_OUT r3 0xfffffffffffffffe
#_ REGISTER_OUT r4 1
test_subfme_one_ca_4:
#_ REGISTER_IN r10 0xFFFFFFFFFFFFFFFF
xor r3, r3, r3
@@ -46,6 +83,18 @@ test_subfme_one_ca_4:
#_ REGISTER_OUT r3 0
#_ REGISTER_OUT r4 1
test_subfme_one_ca_4_constant:
li r10, -1
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0xFFFFFFFFFFFFFFFF
#_ REGISTER_OUT r3 0
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_1:
#_ REGISTER_IN r10 0x00000000000103BF
xor r3, r3, r3
@@ -57,6 +106,18 @@ test_subfme_zero_ca_1:
#_ REGISTER_OUT r3 0xfffffffffffefc3f
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_1_constant:
lis r10, 1
ori r10, r10, 0x03BF
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0x00000000000103BF
#_ REGISTER_OUT r3 0xfffffffffffefc3f
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_2:
#_ REGISTER_IN r10 0
xor r3, r3, r3
@@ -68,6 +129,17 @@ test_subfme_zero_ca_2:
#_ REGISTER_OUT r3 0xfffffffffffffffe
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_2_constant:
li r10, 0
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0
#_ REGISTER_OUT r3 0xfffffffffffffffe
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_3:
#_ REGISTER_IN r10 1
xor r3, r3, r3
@@ -79,6 +151,17 @@ test_subfme_zero_ca_3:
#_ REGISTER_OUT r3 0xfffffffffffffffd
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_3_constant:
li r10, 1
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 1
#_ REGISTER_OUT r3 0xfffffffffffffffd
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_4:
#_ REGISTER_IN r10 0xFFFFFFFFFFFFFFFF
xor r3, r3, r3
@@ -89,3 +172,14 @@ test_subfme_zero_ca_4:
#_ REGISTER_OUT r10 0xFFFFFFFFFFFFFFFF
#_ REGISTER_OUT r3 0xffffffffffffffff
#_ REGISTER_OUT r4 0
test_subfme_zero_ca_4_constant:
li r10, -1
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0xFFFFFFFFFFFFFFFF
#_ REGISTER_OUT r3 0xffffffffffffffff
#_ REGISTER_OUT r4 0