Tracers in x64, almost matching ivm.
This commit is contained in:
Ben Vanik
208
src/alloy/backend/x64/lowering/tracers.cc
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208
src/alloy/backend/x64/lowering/tracers.cc
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2014 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#include <alloy/backend/x64/lowering/tracers.h>
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#include <alloy/backend/x64/x64_emitter.h>
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#include <alloy/runtime/runtime.h>
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#include <alloy/runtime/thread_state.h>
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using namespace alloy;
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using namespace alloy::backend::x64;
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using namespace alloy::backend::x64::lowering;
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using namespace alloy::runtime;
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namespace alloy {
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namespace backend {
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namespace x64 {
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namespace lowering {
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#define IPRINT
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#define IFLUSH()
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#define DPRINT
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#define DFLUSH()
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#define IPRINT if (thread_state->thread_id() == 1) printf
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#define IFLUSH() fflush(stdout)
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#define DPRINT if (thread_state->thread_id() == 1) printf
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#define DFLUSH() fflush(stdout)
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void TraceString(void* raw_context, const char* str) {
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auto thread_state = *((ThreadState**)raw_context);
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IPRINT("XE[t] :%d: %s\n", thread_state->GetThreadID(), str);
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IFLUSH();
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}
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void TraceContextLoadI8(void* raw_context, uint64_t offset, uint8_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("%d (%X) = ctx i8 +%d\n", (int8_t)value, value, offset);
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}
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void TraceContextLoadI16(void* raw_context, uint64_t offset, uint16_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("%d (%X) = ctx i16 +%d\n", (int16_t)value, value, offset);
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}
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void TraceContextLoadI32(void* raw_context, uint64_t offset, uint32_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("%d (%X) = ctx i32 +%d\n", (int32_t)value, value, offset);
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}
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void TraceContextLoadI64(void* raw_context, uint64_t offset, uint64_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("%lld (%llX) = ctx i64 +%d\n", (int64_t)value, value, offset);
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}
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void TraceContextLoadF32(void* raw_context, uint64_t offset, float value) {
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auto thread_state = *((ThreadState**)raw_context);
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union {
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float f;
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uint32_t u;
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} x;
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x.f = value;
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DPRINT("%e (%X) = ctx f32 +%d\n", x.f, x.u, offset);
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}
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void TraceContextLoadF64(void* raw_context, uint64_t offset, double value) {
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auto thread_state = *((ThreadState**)raw_context);
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union {
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double f;
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uint64_t u;
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} x;
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x.f = value;
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DPRINT("%lle (%llX) = ctx f64 +%d\n", x.f, x.u, offset);
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}
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void TraceContextLoadV128(void* raw_context, uint64_t offset, __m128 value) {
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auto thread_state = *((ThreadState**)raw_context);
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//DPRINT("%d (%.X) = ctx i8 +%d\n", (int8_t)value, value, offset);
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}
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void TraceContextStoreI8(void* raw_context, uint64_t offset, uint8_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("ctx i8 +%d = %d (%X)\n", offset, (int8_t)value, value);
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}
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void TraceContextStoreI16(void* raw_context, uint64_t offset, uint16_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("ctx i16 +%d = %d (%X)\n", offset, (int16_t)value, value);
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}
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void TraceContextStoreI32(void* raw_context, uint64_t offset, uint32_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("ctx i32 +%d = %d (%X)\n", offset, (int32_t)value, value);
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}
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void TraceContextStoreI64(void* raw_context, uint64_t offset, uint64_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("ctx i64 +%d = %lld (%llX)\n", offset, (int64_t)value, value);
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}
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void TraceContextStoreF32(void* raw_context, uint64_t offset, float value) {
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auto thread_state = *((ThreadState**)raw_context);
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union {
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float f;
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uint32_t u;
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} x;
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x.f = value;
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DPRINT("ctx f32 +%d = %e (%.X)\n", offset, x.f, x.u);
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}
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void TraceContextStoreF64(void* raw_context, uint64_t offset, double value) {
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auto thread_state = *((ThreadState**)raw_context);
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union {
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double f;
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uint64_t u;
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} x;
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x.f = value;
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DPRINT("ctx f64 +%d = %lle (%.llX)\n", offset, x.f, x.u);
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}
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void TraceContextStoreV128(void* raw_context, uint64_t offset, __m128 value) {
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auto thread_state = *((ThreadState**)raw_context);
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/*DPRINT("ctx v128 +%d = [%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X]\n", ics.rf[i->src1_reg].u64,
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VECF4(ics.rf[i->src2_reg].v128,0), VECF4(ics.rf[i->src2_reg].v128,1), VECF4(ics.rf[i->src2_reg].v128,2), VECF4(ics.rf[i->src2_reg].v128,3),
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VECI4(ics.rf[i->src2_reg].v128,0), VECI4(ics.rf[i->src2_reg].v128,1), VECI4(ics.rf[i->src2_reg].v128,2), VECF4(ics.rf[i->src2_reg].v128,3));*/
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}
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void TraceMemoryLoadI8(void* raw_context, uint64_t address, uint8_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("%d (%X) = load.i8 %.8X\n", (int8_t)value, value, address);
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}
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void TraceMemoryLoadI16(void* raw_context, uint64_t address, uint16_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("%d (%X) = load.i16 %.8X\n", (int16_t)value, value, address);
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}
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void TraceMemoryLoadI32(void* raw_context, uint64_t address, uint32_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("%d (%X) = load.i32 %.8X\n", (int32_t)value, value, address);
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}
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void TraceMemoryLoadI64(void* raw_context, uint64_t address, uint64_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("%lld (%llX) = load.i64 %.8X\n", (int64_t)value, value, address);
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}
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void TraceMemoryLoadF32(void* raw_context, uint64_t address, float value) {
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auto thread_state = *((ThreadState**)raw_context);
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union {
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float f;
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uint32_t u;
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} x;
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x.f = value;
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DPRINT("%e (%X) = load.f32 %.8X\n", x.f, x.u, address);
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}
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void TraceMemoryLoadF64(void* raw_context, uint64_t address, double value) {
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auto thread_state = *((ThreadState**)raw_context);
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union {
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double f;
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uint64_t u;
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} x;
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x.f = value;
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DPRINT("%lle (%llX) = load.f64 %.8X\n", x.f, x.u, address);
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}
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void TraceMemoryLoadV128(void* raw_context, uint64_t address, __m128 value) {
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auto thread_state = *((ThreadState**)raw_context);
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//DPRINT("%d (%.X) = load.v128 +%d\n", (int8_t)value, value, offset);
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}
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void TraceMemoryStoreI8(void* raw_context, uint64_t address, uint8_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("store.i8 %.8X = %d (%X)\n", address, (int8_t)value, value);
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}
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void TraceMemoryStoreI16(void* raw_context, uint64_t address, uint16_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("store.i16 %.8X = %d (%X)\n", address, (int16_t)value, value);
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}
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void TraceMemoryStoreI32(void* raw_context, uint64_t address, uint32_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("store.i32 %.8X = %d (%X)\n", address, (int32_t)value, value);
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}
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void TraceMemoryStoreI64(void* raw_context, uint64_t address, uint64_t value) {
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auto thread_state = *((ThreadState**)raw_context);
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DPRINT("store.i64 %.8X = %lld (%llX)\n", address, (int64_t)value, value);
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}
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void TraceMemoryStoreF32(void* raw_context, uint64_t address, float value) {
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auto thread_state = *((ThreadState**)raw_context);
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union {
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float f;
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uint32_t u;
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} x;
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x.f = value;
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DPRINT("store.f32 %.8X = %e (%X)\n", address, x.f, x.u);
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}
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void TraceMemoryStoreF64(void* raw_context, uint64_t address, double value) {
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auto thread_state = *((ThreadState**)raw_context);
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union {
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double f;
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uint64_t u;
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} x;
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x.f = value;
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DPRINT("store.f64 %.8X = %lle (%llX)\n", address, x.f, x.u);
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}
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void TraceMemoryStoreV128(void* raw_context, uint64_t address, __m128 value) {
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auto thread_state = *((ThreadState**)raw_context);
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/*DPRINT("ctx v128 +%d = [%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X]\n", ics.rf[i->src1_reg].u64,
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VECF4(ics.rf[i->src2_reg].v128,0), VECF4(ics.rf[i->src2_reg].v128,1), VECF4(ics.rf[i->src2_reg].v128,2), VECF4(ics.rf[i->src2_reg].v128,3),
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VECI4(ics.rf[i->src2_reg].v128,0), VECI4(ics.rf[i->src2_reg].v128,1), VECI4(ics.rf[i->src2_reg].v128,2), VECF4(ics.rf[i->src2_reg].v128,3));*/
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}
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} // namespace lowering
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} // namespace x64
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} // namespace backend
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} // namespace alloy
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