[GPU] XeSL resolve shaders + host depth store width fix
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@@ -275,7 +275,7 @@ union ResolveEdramInfo {
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uint32_t pitch_tiles : xenos::kEdramPitchTilesBits;
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xenos::MsaaSamples msaa_samples : xenos::kMsaaSamplesBits;
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uint32_t is_depth : 1;
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// With offset to the 160x32 region that local_x/y_div_8 are relative to.
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// With offset to the region that edram_offset_x/y_div_8 are relative to.
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uint32_t base_tiles : xenos::kEdramBaseTilesBits;
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uint32_t format : xenos::kRenderTargetFormatBits;
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uint32_t format_is_64bpp : 1;
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